Intel Has Banner Quarter, Announces 10nm Systems Available In 2019, Stock Tumbles

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Paul Alcorn
Paul Alcorn
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Paul Alcorn is the Editor-in-Chief for Tom's Hardware US. He also writes news and reviews on CPUs, storage, and enterprise hardware.

26 Comments Comment from the forums
  • rhysiam
    Intel's faster ramp of 10nm data center products is going to be a critical component in fending off AMD's 7nm EPYC Rome processors that arrive early next year. Even with a shorter gap between Intel's desktop and data center processors, AMD has a relatively large window it can exploit with 7nm processors.
    This is all assuming, too, that Intel's first generation 10nm is actually tangibly better than the now extremely mature 14nm process. We saw a few years ago that Intel's first commercially available 14nm CPUs were inferior in raw clock speeds and power efficiency to products on the mature 22nm node. Even a year later the 14nm Broadwell-E chips couldn't clock as high as the 22nm Haswell-E CPUs with matching core counts. That latter example likely has more to do with heat dissipation and density than raw silicone performance/efficiency. Nevertheless, the point remains that it wasn't until Skylake that we actually saw meaningful node-related efficiency and clock speed improvements in consumer products.

    There seems to be this assumption (not necessarily from Toms - more referring to the comment-sphere here) that when Intel finally releases 10nm we'll see meaningful performance improvements from Intel and they'll be ready to "compete" again. That's far from a given though! The 14nm process is so mature now and significantly better than it was at release. If 10nm folllows a similar trajectory we shouldn't be at all surprised if we have to wait until 2nd generation 10nm before we see parts that have equivalent (let alone better!) performance characteristics to the now mature 14nm products.

    Of course, the 7nm process AMD is relying on is also unknown at this point, but the fabs are spruiking sizeable performance gains with 7nm. Interesting times for sure.
    Reply
  • AgentLozen
    Good analysis rhysiam.

    rhysiam said:
    f 10nm folllows a similar trajectory we shouldn't be at all surprised if we have to wait until 2nd generation 10nm before we see parts that have equivalent (let alone better!) performance characteristics to the now mature 14nm products.

    Broadwell wasn't super duper, but it was immediately followed by Skylake a few months later. You may be right that we'll need to wait for a 2nd generation of 10nm chips to see a real benefit, but it may not be far away after the first generation launches.
    Reply
  • InvalidError
    21179735 said:
    Broadwell wasn't super duper
    Broadwell wasn't even meant to be a desktop part. It wasn't until after outrage broke out in enthusiast circles about Broadwell being portable and embedded only product (middle finger to 90-series board owners who were expecting something more than Haswell-Refresh to put on there) that Intel announced a very limited selection of socketed variants with nearly nonexistent availability through most of its market life.

    Cannonlake appears to be in a very similar situation: delayed multiple times, starts shipping to portable and embedded device manufacturers over a year ahead of any probable consumer launch and a hypothetical launch date on a collision course with the next-gen products beyond it.

    If AMD's foundry partners meet performance targets with 7nm and Ryzen 3000, things are going to get real awkward for Intel.
    Reply
  • jeremyj_83
    "Recently leaked roadmaps imply that Intel won't have 10nm server products on the market until mid-2020"

    The biggest issue for Intel is that by then AMD is supposed to be on the Zen 3 core. AMD has stated that the Rome processor was designed to compete with Intel's Ice Lake (new architecture with higher IPC) not Coffee Lake or Cannon Lake (current architecture). That means that the successor to Rome will be going against Ice Lake and AMD is shooting for 10-15% increases in performance each generation. We have already seen that with Zen+ AMD was able to increase performance by 10% via a 3% IPC boost and other enhancements to clocks. With the 3% IPC boost that means that Zen+ is only has a 2-7% lower IPC than Intel and Zen 2 is looking at a 10-15% IPC boost over Zen+. Needless to say this is going to be an interesting couple of years for the consumer.
    Reply
  • Patrick_1966
    As with the 14nm cores it will take more then a year for this to be resolved into products you can buy at Best buy off the shelf. OEMs are just getting samples now, they still need to design, test and manufacture at scale. So expect 10nm to be come commonly available around Late August 2020 or early spring April or May 2021.
    Reply
  • jimmysmitty
    21180044 said:
    21179735 said:
    Broadwell wasn't super duper
    Broadwell wasn't even meant to be a desktop part. It wasn't until after outrage broke out in enthusiast circles about Broadwell being portable and embedded only product (middle finger to 90-series board owners who were expecting something more than Haswell-Refresh to put on there) that Intel announced a very limited selection of socketed variants with nearly nonexistent availability through most of its market life.

    Cannonlake appears to be in a very similar situation: delayed multiple times, starts shipping to portable and embedded device manufacturers over a year ahead of any probable consumer launch and a hypothetical launch date on a collision course with the next-gen products beyond it.

    If AMD's foundry partners meet performance targets with 7nm and Ryzen 3000, things are going to get real awkward for Intel.

    Thats the real question though. Many times have companies promised performance gains only for it to be nothing really or possibly worse. We will have to wait for both to see the true performance gains.

    Normally die shrinks don't increase performance in and of itself. Normally its clock speeds that can go up.

    Guess we will see how th enext year unfolds. I am more interested to see if Intel continues on the same path or plans to push a new uArch out since Core seems to be hitting a pretty thick performance wall. Its been a good run but maybe its time to move past it.
    Reply
  • InvalidError
    21180271 said:
    Normally die shrinks don't increase performance in and of itself. Normally its clock speeds that can go up.
    And what makes those higher clock speeds possible? Shorter traces that reduce wire propagation delays, smaller transistors with smaller gate charge for faster switching, lower dynamic power draw from reduced parasitic capacitance and switching losses, etc. All affected quite significantly by process shrinks.

    The main reason we aren't seeing substantial frequency bumps with die shrinks anymore is that CPU designers are choosing to use the faster transistors to cram more logic between synchronous latches instead of ratcheting clock frequencies at any cost. Doing more work per clock cycle is more power-efficient, clock frequencies get whatever bump leftover timing margins can afford. No generation transition shows this better than Prescott to Core where Core made on a more mature 65nm process than Prescott clocking ~800MHz lower but still destroying Prescott on performance while using significantly less power.

    More work per clock is where everyone's focus is at because bumping clock frequencies at any cost has been a monumental failure for everyone who's tried it.
    Reply
  • mlee 2500
    That's an excellent point I hadn't considered, but you may absolutely be right.

    Interestingly, even today, cores found on the very mature 14nm process you mention are only ~30% faster then those found on 22nm silicon from 2012. Sure, there are a couple more of those cores squeezed onto the chip, but for most desktop users that doesn't translate into noticeable value.

    I'd hoped Cannon Lake would finally represent the *truly* generational leap in per-core performance that would make upgrading even Ivy Bridge era products worthwhile, but first-gen 10nm may still not be it.


    21179279 said:
    Intel's faster ramp of 10nm data center products is going to be a critical component in fending off AMD's 7nm EPYC Rome processors that arrive early next year. Even with a shorter gap between Intel's desktop and data center processors, AMD has a relatively large window it can exploit with 7nm processors.
    This is all assuming, too, that Intel's first generation 10nm is actually tangibly better than the now extremely mature 14nm process. We saw a few years ago that Intel's first commercially available 14nm CPUs were inferior in raw clock speeds and power efficiency to products on the mature 22nm node. Even a year later the 14nm Broadwell-E chips couldn't clock as high as the 22nm Haswell-E CPUs with matching core counts. That latter example likely has more to do with heat dissipation and density than raw silicone performance/efficiency. Nevertheless, the point remains that it wasn't until Skylake that we actually saw meaningful node-related efficiency and clock speed improvements in consumer products.

    There seems to be this assumption (not necessarily from Toms - more referring to the comment-sphere here) that when Intel finally releases 10nm we'll see meaningful performance improvements from Intel and they'll be ready to "compete" again. That's far from a given though! The 14nm process is so mature now and significantly better than it was at release. If 10nm folllows a similar trajectory we shouldn't be at all surprised if we have to wait until 2nd generation 10nm before we see parts that have equivalent (let alone better!) performance characteristics to the now mature 14nm products.

    Of course, the 7nm process AMD is relying on is also unknown at this point, but the fabs are spruiking sizeable performance gains with 7nm. Interesting times for sure.

    Reply
  • bit_user
    21180410 said:
    21180271 said:
    Normally die shrinks don't increase performance in and of itself. Normally its clock speeds that can go up.
    And what makes those higher clock speeds possible? Shorter traces that reduce wire propagation delays, smaller transistors with smaller gate charge for faster switching, lower dynamic power draw from reduced parasitic capacitance and switching losses, etc. All affected quite significantly by process shrinks.

    The main reason we aren't seeing substantial frequency bumps with die shrinks anymore is that CPU designers are choosing to use the faster transistors to cram more logic between synchronous latches instead of ratcheting clock frequencies at any cost. Doing more work per clock cycle is more power-efficient, clock frequencies get whatever bump leftover timing margins can afford.
    Isn't leakage now supposed to be getting worse with each new generation? Is it conceivable that smaller nodes could even lose ground on power efficiency?
    Reply
  • InvalidError
    21185713 said:
    Isn't leakage now supposed to be getting worse with each new generation? Is it conceivable that smaller nodes could even lose ground on power efficiency?
    Conventional leakage has been a concern for a long time already and much of it gets offset by lower voltages.

    What is new is quantum physics becoming a concern. For example, enough insulation to limit leakage through insulation (conventional electrical leakage from imperfect insulation) isn't good enough when the probability function of electrons "teleporting" through the insulation (quantum tunneling) increases from distances getting smaller. Chip makers will either need to find a way to use materials that are less susceptible to tunneling or a way to exploit tunneling and other quantum effects that are undesirable in conventional circuit design.

    While leakage and tunneling may be similar in that they cause an increase in static power due to letting some current to pass without doing any useful work, I suspect quantum tunneling is going to be much more difficult to solve if at all possible.
    Reply