Intel Panther Lake and Wildcat Lake CPU specs break cover — leak suggests up to 16 CPU cores and 180 total AI TOPS
Panther Lake is reserved for laptops, while Wildcat Lake supposedly succeeds the Alder Lake-N series.
![Intel](https://cdn.mos.cms.futurecdn.net/fJDMeVAgTgJrUtvsaJJdYe-1200-80.jpg)
In a flurry of tweets detailing Intel's upcoming processors, avid hardware leaker Jaykihn has shared specifications for Panther Lake and Wildcat Lake. Arriving in H2 this year, Panther Lake is the successor to Arrow Lake-H, which launched at this CES. Meanwhile, Wildcat Lake is rumored to power Intel's next-gen N-series chips, designed for lightweight laptops and mini-PCs.
Lunar Lake, crowned with the fastest integrated GPU per our testing, is a one-off design, as integrating memory directly into the CPU die has proven too costly for Intel to standardize. With no direct successor to Lunar Lake, Panther Lake follows Arrow Lake in less than one year, built using Intel's flagship 18A process technology.
Wildcat Lake has remained chiefly undercover, apart from a few design tools that surfaced at NBD. The same leaker claims it is designed for low-power and low-cost Chromebooks, mini-PCs, and embedded devices, and it succeeds the Alder Lake-N series.
CPU Codename | Core Configuration | Xe Cores | PCIe 5.0 Lanes | PCIe 4.0 Lanes | Thunderbolt 4 Ports | Memory Support | AI TOPS (CPU+NPU+iGPU) |
---|---|---|---|---|---|---|---|
Panther Lake | 16 Cores (4P + 8E + 4LPE) | 12 | x4 | x8 | 4 | LPDDR5X-7467/8533 | 180 TOPS (10+50+120) |
Panther Lake | 16 Cores (4P + 8E + 4LPE) | 4 | x12 | x8 | 4 | LPDDR5X-7467/8533, DDR5-7200 | 100 TOPS (10+50+40) |
Panther Lake | 8 Cores (4P + 0E + 4LPE) | 4 | x4 | x8 | 4 | LPDDR5X-6800, DDR5-6400 | 100 TOPS (10+50+40) |
Wildcat Lake | 6 Cores (2P + 0E + 4LPE) | 2 | N/A | x6 | 2 | LPDDR5X-6800, DDR5-6400 | 40 TOPS (4+18+18) |
There have been rumors of an 18-core counterpart of Panther Lake, though the exact specifications of these SKUs haven't been confirmed, per Jaykihn. Nonetheless, as reflected in the table below, the leaker has relayed details of three finalized Panther Lake variants. The top-end Panther Lake configuration boasts 16 CPU cores, likely based on Cougar Cove and Darkmont, alongside 12 Xe3 (Celestial) GPU cores. The second variant has fewer Xe3 cores but more PCIe 5.0 lanes, likely for a dedicated GPU. The third and last configuration features no E-cores, sticking to a 4P + 4LPE design.
Wildcat Lake seemingly only has one variation with six cores (2P + 4LPE), presumably using the exact Cougar Cove and Darkmont cores as Panther Lake. However, the Compute Tile will likely only house the two P-cores, while the LPE-cores are expected to reside in the SoC Tile. On the other hand, 40 AI TOPS could make for some fascinating use cases of these processors in edge and mobile machine learning applications.
Some SKUs may use LPCAMM, which offers fast and upgradable memory simultaneously. We don't have an expected release timeframe for Wildcat Lake, but early 2026 or even late 2025 may be potential candidates.
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Hassam Nasir is a die-hard hardware enthusiast with years of experience as a tech editor and writer, focusing on detailed CPU comparisons and general hardware news. When he’s not working, you’ll find him bending tubes for his ever-evolving custom water-loop gaming rig or benchmarking the latest CPUs and GPUs just for fun.
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bit_user
LPDDR5-8533 equates to theoretical bandwidth of 136.5 GB/s. Do you think it'll be enough?Gururu said:They are really not messing around with that iGPU.
For graphics, I guess maybe, if they lean into that "side cache", introduced in Lunar Lake. But, it would need to scale like AMD did with Infinity Cache.
Considering its 180 TOPS, that works out to 1318 ops per byte of memory bandwidth. I think it won't be enough for that.
For comparison, consider that a RTX 4060 Ti has 177 TOPS and 288 GB/s of memory bandwidth. That's about twice the bandwidth per op. -
usertests Wildcat Lake could be an amazing successor to Alder Lake-N, but a lot of things have to go right.Reply
Can it really be a cheap, high-volume, low-margin product on Intel 18A? This node could be significantly more expensive than Intel 7 (10ESF). On the plus side, it should bring great power efficiency improvements.
Does it even use chiplets? The article seems to assume it will, but it could be small enough to be monolithic instead. L3 cache is another big question mark since there is only 6 MiB on the predecessor and LP E-cores in Meteor/Lunar Lake have not been able to access L3 cache. If the 4x LP E-cores in Wildcat Lake can't access L3, they will fall flat in some workloads.
What will the dominant SKU have? Alder Lake-N is an 8-core, 32 EUs die but most of the good deals were for 4-cores with less CUs, like the N100. If a P-core gets disabled on the majority of chips, that's a big downgrade for some applications. On the other hand, if 2 E-cores get disabled, the 2+2 config will be fine.
I'm not sure if it would really use an Xe3 iGPU, but with the full 2 Xe cores, I guess it could be twice as fast as the full Alder Lake-N 32 EUs. But some SKUs may disable that to half, bringing no major improvement. If it is double or better, some games that ran at 720p on N100/N200 could go to 1080p instead.
DDR4 memory support is dropped, which will raise prices since the cheapest Alder Lake-N systems use DDR4 to save a few bucks (literally). It will be disappointing if it's limited to single-channel memory support again, but raising the maximum speed from LP/DDR5-4800 is helpful.
At the end of the day, the big deal with Wildcat Lake is the inclusion of Cougar Cove P-cores. Single-threaded performance could jump forward by nearly a decade compared to Alder Lake-N. This signals that Intel's hybrid/heterogeneous CPUs are ready to do what was long promised (tried and failed with "Lakefield"): deliver single-threaded performance about as good as any other current chip, within a low power envelope, and at a low(?) price. The P-core clocks will be lower than Panther Lake-H, Nova Lake, etc., but it's still a big step up for the Atom line.
It's fun to see a "1-tile" 18 TOPS NPU. It may not meet the "Copilot+" performance threshold, but it won't take up much die area and can be used by any application that supports it. -
Eximo Theoretically DDR5 prices will keep dropping as DDR4 production is switched over. They have to draw the line somewhere.Reply -
Giroro My only real complaint about Alder Lake N is that I had the single channel DDR4 version, which I think was bottlenecking me from doing everything I wanted in a 24/7 OBS stream. Otherwise it's surprisingly very usable for your mom's Facebook and email.Reply
I'm still waiting for the day N100/N95 finally replaces the awful, obsolete celeron processors still used at the lowest-end. Maybe whateverlake will push it down the stack. -
thestryker
GPU is supposedly 120 of the 180, CPU and NPU make up the rest.bit_user said:Considering its 180 TOPS, that works out to 1318 ops per byte of memory bandwidth. I think it won't be enough for that.
It seemed like ADL-N really needs the extra bandwidth from DDR5 since it was limited to single channel at base JEDEC speeds.Giroro said:My only real complaint about Alder Lake N is that I had the single channel DDR4 version, which I think was bottlenecking me from doing everything I wanted in a 24/7 OBS stream. -
thestryker I'm not sure I really buy into WCL being a successor to ADL-N as that seems like a really odd choice which shouldn't be better than an 8 E-core part. It would certainly be a good replacement for the 1P/4E ADL SKUs though. I'm very curious about the lack of a 6 P-core PTL design, because the last time a couple of cores disappeared it was MTL and likely due to Intel 4.Reply -
usertests
All Alder Lake-N products are limited to single channel, there is no dual-channel support. Which is why memory speeds became more important than usual since it could actually be less bandwidth than previous generation dual-channel Jasper Lake.Giroro said:My only real complaint about Alder Lake N is that I had the single channel DDR4 version, which I think was bottlenecking me from doing everything I wanted in a 24/7 OBS stream. Otherwise it's surprisingly very usable for your mom's Facebook and email.
I'm still waiting for the day N100/N95 finally replaces the awful, obsolete celeron processors still used at the lowest-end. Maybe whateverlake will push it down the stack.
From where I'm standing, Alder Lake-N has cleared away a lot of that. You can probably find sub-$100 products somewhere (particularly used market) with N4000, N6000, or something. But I even see N100, N200, and similar in the cheap laptops at Walmart.
ADL-N is 8x Gracemont cores, but most commonly sold with half disabled as quad-core N95/N97/N100/N200 and now the Twin Lake refresh N150.thestryker said:I'm not sure I really buy into WCL being a successor to ADL-N as that seems like a really odd choice which shouldn't be better than an 8 E-core part. It would certainly be a good replacement for the 1P/4E ADL SKUs though. I'm very curious about the lack of a 6 P-core PTL design, because the last time a couple of cores disappeared it was MTL and likely due to Intel 4.
Skymont delivered massive integer/floating-point IPC uplifts over Gracemont/Crestmont. Darkmont probably adds a small (<5%) improvement over that. So already, four of those cores could match six of Gracemont.
Then you come to the Cougar Cove P-cores, which will absolutely smoke Gracemont. They could easily be more than twice as fast as a Gracemont core, delivering great single-threaded performance which is what users tend to notice.
There are some potential red flags:
- Will the true low-end systems get the full 2+4 die? Or cut down to 2+2, or even 1+4 or 1+3?
- The Darkmont cores are described as LP E-cores. Will they have access to L3 cache, or become much slower than expected from having no L3 and all L2 cache misses going straight to DRAM?
If it's just the core count regression you're worried about, it's unlikely the top 6-core Wildcat Lake would be slower in multi-threading than the i3-N305. Even if the LP E-cores are unexpectedly terrible, it should outperform the N305 in most scenarios, and definitely the N200.
Graphics should also be a lot faster, and it supports 33-42% faster DDR5/LPDDR5X memory with the DDR4 options taken off the table, which will help if they stick with single channel again. (This is all assuming the leak is correct) -
thestryker
Oh I'm not talking about versus ADL-N using Gracemont but rather an 8 core Skymont/Darkmont part. I have a hard time believing a 2P/4LPE could really compete with such a configuration and it would also likely have a larger die size. The 4LPE could be entirely due to reusing SoC tiles (I'm guessing they're not following the two tile design of LNL due to the wildly different GPU/PCIe configurations in this leak) across the stack.usertests said:If it's just the core count regression you're worried about, it's unlikely the top 6-core Wildcat Lake would be slower in multi-threading than the i3-N305. Even if the LP E-cores are unexpectedly terrible, it should outperform the N305 in most scenarios, and definitely the N200.
Graphics should also be a lot faster, and it supports 33-42% faster DDR5/LPDDR5X memory with the DDR4 options taken off the table, which will help if they stick with single channel again. (This is all assuming the leak is correct)
I'm also not sure how much faster 2 Xe cores (who knows which Xe arch these will be) is going to be than the existing 32 EU in the top ADL-N SKUs though faster memory will probably mean more than anything else here.
Given that all of Intel's designs with LPE haven't had L3 access even when on the same tile it seems likely this won't either. LNL had a separate cache which somewhat helped to alleviate this, but that doesn't seem like a great design choice for what inherently should be a low cost part.usertests said:- The Darkmont cores are described as LP E-cores. Will they have access to L3 cache, or become much slower than expected from having no L3 and all L2 cache misses going straight to DRAM? -
usertests
I have no idea what to believe about the tiles. It seems like the complete package would be small enough that they could decide to make it monolithic, but maybe not.thestryker said:Oh I'm not talking about versus ADL-N using Gracemont but rather an 8 core Skymont/Darkmont part. I have a hard time believing a 2P/4LPE could really compete with such a configuration and it would also likely have a larger die size. The 4LPE could be entirely due to reusing SoC tiles (I'm guessing they're not following the two tile design of LNL due to the wildly different GPU/PCIe configurations in this leak) across the stack.
My position is that the P-cores are more beneficial to most users. For the low end, once you've gotten to quad-core (I'm using an i3-10105), what you really want is single threads to be fast since most code from here to eternity is single-threaded. So 2+4 is fine, great even. I see this as the realization of what Intel's Lakefield experiment failed to deliver.
I didn't see much of the 1+4 Alder Lake-U chips on the market. Which is too bad, because I think 1+4 would deliver a generally superior experience to the i3-N305, not to mention the dual-channel memory. A quick Passmark comparison shows the 5-core Pentium Gold 8505 only losing a little in MT to the N305, but it's overall a better chip from around +50% ST. I think that's a similar scenario to your hypothetical 8-core Darkmont config vs. 2+4 Wildcat Lake (ignoring the LP E-core caveat).
ADL-N is using similar Xe-LP introduced way back in 11th gen Tiger Lake. Xe2-LPG ("Battlemage") is said to be around +50%. If they did go with Xe3-LPG ("Celestial"), that's potentially another uplift. 2x Xe2/3 cores should be 16 Vector Engines which is comparable to the old terminology of 32 EUs, so I would call it the same size. Hopefully it has what it needs for fancy AI upscaling, and they don't slash the iGPU by half in the best-selling SKUs.thestryker said:I'm also not sure how much faster 2 Xe cores (who knows which Xe arch these will be) is going to be than the existing 32 EU in the top ADL-N SKUs though faster memory will probably mean more than anything else here.
Yeah, this could be the Achilles' heel of Darkmont "LP E-cores".thestryker said:Given that all of Intel's designs with LPE haven't had L3 access even when on the same tile it seems likely this won't either. LNL had a separate cache which somewhat helped to alleviate this, but that doesn't seem like a great design choice for what inherently should be a low cost part.