A pre-launch Geekbench 7 result, shared on X by INIYSA as one of OpenAI’s dots (it's answer to Meta's Muse), shows a multi-core score of 9,435, with indications of the hardware used by the new autonomous agent. The VM hardware appears to be a single nine-core slice of an AMD EPYC 9V74 with 9.73GB of memory, run on Ubuntu for the leak and Debian for post-launch runs. Our check of Geekbench 7’s public database found six runs on that configuration uploaded since launch, ranging from 1,512 to 1,614 single-core and 8,135 to 8,991 multi-core. Dots, powered by GPT-6 Astra, launched at OpenAI’s DevDay on Tuesday for Pro and Business Premium users.

OpenAI bills the autonomous agents as having “their own cloud computer, their own browser, and the apps you’ve connected” in its introduction. This is not a new concept: Cursor says its cloud agents get their own virtual machines; SpaceXAI says every Grok Bot shares one persistent cloud computer; and Meta’s Muse gives each agent a sandbox.

Maddie D. Reese posted on X on launch day the apps her dot said came preloaded. The lineup includes Chromium, Blender, GIMP, Inkscape, Kdenlive, Godot, FreeCAD, OpenSCAD, KiCad, QGIS, ParaView, 3D Slicer, with Python, Node.js, and Git. In the same reply, the dot said its cloud computer runs “Debian Linux.”

The post went up the evening of launch day, captioned “OpenAI dots Geekbench 7 Score,” with a screenshot showing a single-core score of 1,667 and multi-core of 9,435. The result in the screenshot shows that it was uploaded Sept. 25, or four days before the launch. The 9,435 is almost 5% higher than the post-launch best and about 10% higher than the median. The pre-launch run is potentially a bit of an outlier, but performance remains within the same ballpark. It is uncertain who ran the original benchmark.

Tom’s Hardware previously reported that rival Meta’s Muse runs on AMD EPYC Turin with two cores and 8GB per sandbox. The 10 Muse runs in Geekbench’s database have median scores of about 1,041 single-core and 1,394 multi-core. The dot’s post-launch runs, with median scores of 1,570 and about 8,550, put it at about 1.5x the single-core and 6x the multi-core score.

Some of this gap is accounted for by the nine-core vs. two-core configuration; the rest of the gap likely comes from a difference in clock speed, partially offset by Muse’s newer architecture. Geekbench lists a 2.6GHz base clock for the dot’s EPYC 9V74 against 1.5GHz for Muse’s EPYC 9D25.

Muse’s runs also report 7.75GB of memory. Our independent run for this article came back with a single-core score of 1,000 and a multi-core score of 1,433, in line with the other Muse runs.

Data center CPU demand for always-on agents has surged as high-core-count CPUs are needed at sustained load. It is unknown whether the dots, as tested, hold their cores while idle. Such agents are rising in popularity: Muse reportedly passed 500,000 daily active users, and SpaceXAI plans standalone Nvidia Vera CPUs for Grok’s agentic workloads. It may only be a matter of time before a new CPU arms race begins. OpenAI has already said that, in the future, users will be able to add more dots and “scale the output of each dot by ... increasing its speed.”

President Donald Trump, several Cabinet members, and House Speaker Mike Johnson sat down with key AI leaders for high-level discussions on AI, as recent incidents such as the publicized Hugging Face hack have brought forth issues about AI safety. The meeting resulted in a document titled “Joint Commitment on Frontier Responsibilities,” which states that “every company is responsible for developing its own technology safely,” and was signed by Sundar Pichai (Alphabet), Dario Amodei (Anthropic), Mark Zuckerberg (Meta), Greg Brockman (OpenAI), Elon Musk (SpaceXAI), Jensen Huang (Nvidia), and Trump himself. According to CNN, the president argued that this was the best way to move forward with AI, which he dubbed “Super Intelligence,” as it balances progress with safety.

The pledge outlines four key points: (1) Implement robust internal controls to monitor the capabilities and alignment of its models during training and deployment around areas like cybersecurity, biosecurity, and chemical threats, and to ensure that its models do not hack or access technical systems in unintended ways; (2) Empower an internal team to ensure all of the controls, monitoring, and detection are operating as intended, and that any issues are remediated; (3) Partner with an independent external auditor or evaluator to carry out independent assessments of whether the controls, monitoring, and detection are operating as intended; and (4) Designate an independent committee of the board of directors to oversee and receive reports from the teams operating the controls and the internal and external auditors and evaluators, as well as to ensure any issues identified are remediated.

“I’m seeing tremendous self-policing, and they understand that they have to self-police,” Trump told reporters outside the West Wing. “These models are very complex and, again, I believe they’re going to be used for the good.” While this pledge has no law or regulatory pressure behind it, the president still called it “morally binding,” and that he believes that the AI companies can monitor themselves without the need for additional regulation.

The White House AI luncheon happened after several months of alarming incidents involving frontier AI models. One of the biggest incidents that has happened so far was when OpenAI’s GPT-5.6 Sol and other unreleased models broke out of their testing environment and hacked HuggingFace last July, which was followed by a discovery in August that these models had been secretly communicating with each other. It even had to pause testing just last week after a rogue agent failed to respond to a “kill switch.” Anthropic also discovered that Claude AI is building itself at a faster rate than expected, which is likely one of the reasons that led to Amodei’s call to slow down frontier model development. More surprisingly, Elon Musk and Sam Altman, two figures who've frequently clashed with Amodei (and with each other), agreed with his proposal.

On the other hand, Trump dismissed their concerns as hoaxes and called it a “sick conspiracy,” while Jensen Huang said that their fears are a “distraction,” and that AI labs should be accountable for any damage that their rogue agents may make. Chinese state media also said that move was “a response to Chinese competition,” and that “a global AI-safety framework that excludes China is not quite global.” Still, it mentioned the need to monitor AI development as humans could lose control of the technology.

This meeting apparently put most of the U.S. AI industry’s leadership and the Trump administration on the same page when it comes to AI safety. While this is just a pledge and not legally binding in any way, it has at least got the heads of the biggest AI labs and policymakers in Washington discussing the potential unintended consequences of AI development. How clashes with the pledge will be remediated, and the timeline in which that happens, remains an open question.

Insomniac Games' Marvel's Wolverine is the hot new PS5 game right now, but that's all it is — there's no PC version in the works, and given Sony's reported decision not to bring single-player games to PC, that seems unlikely to change anytime soon. However, that doesn't mean PC gamers are out in the cold after it was confirmed that an experimental PS5 emulator has been shown to be able to run the early portions Marvel's Wolverine, though only at single-digit frame rates.

While the KytyPS5 emulator was already able to start the game up, that was all it was able to do. That was great if you just wanted to be able to move around the game's menus, but it wasn't much use beyond a proof of concept. Now, things have progressed considerably, with VideoCardz pointing to an X social media post showing the emulator rendering the game's cinematics and gameplay.

The latest build of KytyPS5 can indeed play the game, but it does so at a single-digit frame rate. That's a long way short of making the action-packed title playable on anything other than a PS5 or PS5 Pro. But it's a start, and a much more promising one than was the case previously.

The frame rate situation probably says more about the emulator than the game itself. KytyPS5 is still very much in the early stages of its development, which means that issues are to be expected — especially for a title that has only been available for a few weeks. The emulator's developers are also focused on making it boot more games rather than making a handful work flawlessly, so it's unlikely it will be ready for prime time for a little while yet.

None of this is to detract from the work that has been done to get this point, though. The rapid progress that Marvel's Wolverine has seen is promising for the future of PS5 emulation on PC. KytyPS5 uses Vulkan 1.3 for its graphics output and uses an in-house system to decode the PS5's RDNA 2 GPU instructions. It's also available for both Windows and Linux right now, with an even more experimental version in the works for macOS.

This news also comes as another PS5 emulator has reached something of a milestone of its own. The developers behind SharpEmu, another experimental PS5 emulator, have been able to run a number of PS5 games at a playable 60 FPS. But even then, the success is modest —the developers only got six of 55 games to that point. A further six reached the point of gameplay, albeit at lower frame rates.

All Xbox gamers can now get digital versions of their game library with the rollout of the Disc to Digital feature, which allows them to secure a digital license for the game tied to the physical media and associated with their Xbox profile. The gaming company said on X that players on Xbox Series X and Xbox One could take advantage of this licensing program, allowing them to play their games without needing to insert the disc into the console.

Xbox has been experimenting with a feature that would let you digitize your physical game library since early July of this year, with the company rolling it out to Xbox Insiders first in late August. Now that Disc to Digital licensing is available to all Xbox users, gamers with extensive physical game libraries could get digital licenses for their titles, allowing them to install and play those games on Xbox consoles where they’re logged in. However, Microsoft says not all Xbox One and Xbox Series X titles are eligible for this feature, and that eligibility may change over time. The company said that this could be due to changes in technical factors, licensing, publishing rights, manufacturing, and more. You also need to have access to the qualifying disc to retain the digital license — if you lose, sell, or give away the eligible title, your digital license may be limited or revoked.

While this move is more of a quality-of-life feature than a full game preservation strategy, it still gives hope to gamers who prefer the “ownership” of physical games on discs over the licenses you get when buying them online. This is especially crucial after Sony announced that it will kill the PlayStation disc by 2028. This decision received a lot of criticism, with a Change.org petition to reverse the decision reaching more than 200,000 signatures a week after the company made the announcement. Despite that, it has doubled down on the decision, saying that it will move forward cautiously and stop manufacturing physical media for new releases by January 2028.

While Sony is moving towards a disc-less future, it seems that Xbox is choosing a hybrid path that allows gamers to own their physical games while still giving them the convenience of having a copy of the title in their digital library without requiring another purchase. Former Xbox CEO Phil Spencer said a couple of years ago that it won’t abandon physical media despite the success of Game Pass, and this move shows its commitment to the promise, even if Spencer has since retired.

A new PS5 jailbreak has been released with support for all PlayStation 5 consoles running firmware 7.00 through 13.60, meaning all consoles that haven't been updated within the last week or so are compatible. That includes the latest PS5 Pro console, too.

The new jailbreak, called Relapse, uses browser and kernel exploits to unlock kernel read and write access, including support for additional payloads like the homebrew enabler etaHEN.

However, while support for consoles all the way up to firmware 13.60 opens the door to more jailbreakers than ever before, the free-for-all might be short-lived. As VideoCardz reports, some games are already requiring the latest 14.00 firmware in order to download updates.

One example is the new Marvel's Wolverine game, with gamers reporting that the disc-based version requires PS5 firmware version 13.40. Downloading the latest 1.001.005 game update bumps the required firmware to version 13.60, which shouldn't be a problem for the Relapse jailbreak. But the fly in the ointment appears to be the digital version of the game. Some gamers have reported that the same update for the digital version of the game requires firmware version 14.00, pushing the PS5 beyond the firmware supported by Relapse.

This news leaves PS5 jailbreakers with a familiar Catch-22 situation. Some games, especially future releases, may require a newer version of the PS5 firmware in order to run. But installing those newer PS5 firmwares will break the jailbreak, giving gamers a decision to make — do they want to play the latest games or maintain their jailbreak?

Marvel's Wolverine aside, there are a number of reasons that gamers may wish to jailbreak their PS5 or PS5 Pro consoles. Doing so bypasses Sony's software restrictions, giving gamers the chance to install and run non-standard software and games. That can include pirated titles, of course, but it also means that emulators, including one for Nintendo Switch games, and mods can be used on a PlayStation. Naturally, those who choose to do this accept the inherent risks involved and do so at their own risk.

More information about Relapse can be found on the jailbreak's GitHub page.

Discover where AI is innovating in chipmaking and EDA at Tom's Hardware Premium AI Chip Design Week, from September 28th to October 2nd. Here you will find free in-depth reporting and analysis on the current state of AI in the chip design ecosystem, from Premium News to interviews with OpenAI, and much more.

Today is a big day for TP-Link, as the company revealed that it has opened preorders for its first Wi-Fi 8 hardware. The previously announced Archer 8 Ultra router makes the company’s first entry into what will become a fully stocked portfolio covering Wi-Fi 8 standalone and mesh routers, access points, and client adapters. Interestingly, TP-Link makes it clear that preorders kicked off today in the United Kingdom, Germany, Australia, and other global markets.

Given that the United States is a key consumer market for TP-Link, the fact that the country is left off the preorder list is telling, but not exactly a surprise to anyone who has been following the wireless industry over the past six months. TP-Link has sat on the sidelines as competitors including Netgear, Asus, and Amazon gained Conditional Approvals from the Federal Communications Commission (FCC) to sell their hardware in the U.S. Without the Conditional Approval, companies are effectively banned from selling new wireless hardware in the country that wasn't already approved by the FCC.

So, while earlier Wi-Fi 7 gear from TP-Link that received FCC certification can still be sold, any new Wi-Fi 7 or Wi-Fi 8 products are effectively blocked from the market. The company has made several critical moves to position itself as a U.S. company, including incorporating TP-Link Systems in California, but those moves have been challenged in legal filings.

At this point, there haven’t been any clear signs that the U.S. government will lift its freeze on TP-Link hardware, so until that time comes, the Archer 8 Ultra will remain unavailable stateside. And it’s a shame, because the Archer 8 Ultra, which utilizes a Broadcom Wi-Fi 8 chipset, will deliver up to 33 percent more real-world throughput compared to TP-Link’s Wi-Fi 7 hardware, and 24 percent more consistent throughput when operating in high-interference conditions.

The Archer 8 Ultra will feature two auto-sensing 10 Gbps WAN/LAN ports and four 2.5 Gbps LAN ports. TP-Link says that the router covers up to 3,600 square feet and will support up to 200 devices.

"Wi-Fi 8 sets a new foundation, and we’ve built beyond it,” said Jim Poder, Senior Vice President of R&D at TP-Link. “Archer 8 Ultra combines our Wi-Fi 8 StabilityEngine with intelligent antenna technology and AI-powered optimization to deliver what matters most: a smarter, more reliable network that’s easier to use.”

TP-Link’s Wi-Fi 8 family will expand in Q1 2027 with a Deco 8 Ultra mesh router, and a Roam 8 travel router in Q2 2027. Throughout the year, further additions will come in the form of new PCIe/USB wireless adapters, access points, and range extenders.

AI has transformed the way we do things in life. If you are passionate about 3D printing, Meshy 7 is a tool you should try. This AI-powered platform can revolutionize your workflow by bringing your ideas to life as quickly as possible, with no modeling skills required. If you are not already on board, Meshy is running a special offer for new customers. They can enjoy a 60% discount on their first month’s subscription with the exclusive code TOMESHY60.

• Check out the Meshy 7 deal on Meshy

Instead of spending hours modeling from scratch, Meshy 7 gives you a platform to generate print-ready 3D models of your ideas in minutes. All you need to do is feed the AI with text prompts and 2D images (sketches, drawings, or photographs), and Meshy 7 will prepare the 3D model, which you can send to the best 3D printers to commence the print job. Meshy 7 produces some of the best 3D models with regard to speed and quality.

Meshy 7, the latest model launched in August of this year, brings many improvements over its predecessor. The AI has improved significantly, and your projects come out very close to what you imagine, eliminating the need for repeated prompts or going back to the drawing board. 3D models from Meshy 7 feature improved geometry and texture quality, with greater accuracy to the original image.

Meshy currently offers four subscription plans: Free, Starter, Pro, and Premium. The Free plan is a great way to get started and explore the platform’s capabilities. However, 3D printing enthusiasts or professionals should choose a paid tier, which offers higher priority in the generation queue, faster processing speeds, and the ability to run more concurrent tasks.

Newcomers get 50% off their first month on the Pro, Premium, and Ultra plans, which are regularly priced at $40 and $20, respectively. The savings do not stop there. Use code TOMESHY60 at checkout for an additional 10% off. The code has no expiration date, so you can take your time and explore Meshy 7's benefits with this risk-free deal.

If you're looking for more savings, check out our Best PC Hardware deals for a range of products, or dive deeper into our specialized SSD and Storage Deals, Hard Drive Deals, Gaming Monitor Deals, Graphics Card Deals, Gaming Chair, Best Wi-Fi Routers, Best Motherboard, or CPU Deals pages.

Anthropic has released a new report, claiming that Zhipu AI's GLM-5.3 AI model can be used to generate malicious content, with weak safeguarding. The company claims that the AI model can be used for cyberattacks, and that its safeguards can be bypassed using several methods.

Anthropic's report comes amidst a chorus of calls for a slowdown of AI development, with the company seeking governance and regulation. Despite CEO Dario Amodei's calls for pacing the AI frontier, Claude Opus 5.5 and Claude Sonnet 5.5 were released just days after alarms were raised.

Now, the closed-source AI company, which is currently eyeing an IPO, says that Chinese open-weight models can be abused and can generate harmful content. Anthropic cites the Center for AI Standards and Innovation's own report, published in late September, which claims that GLM-5.3 can fully automate exploits on a similar level to Anthropic's own unreleased Claude Mythos AI model, which spurred the company to develop Project Glasswing, an effort that gives developers access to a Mythos-class AI model to patch bugs and to fix vulnerabilities before such AI models are released.

Anthropic ran its own benchmarks on GLM-5.3 in Exploitbench, where AI models, in a sandboxed environment, can develop exploits for Google Chrome. GLM-5.3 developed end-to-end exploits 50 times in 410 runs, with Mythos leading the pack with 56 successful exploits in 410 attempts. Zhipu AI's model was further tested in one of Anthropic's internal benchmarks, which targets the development of "full control-flow hijacks". GLM 5.3 performed just below Mythos once more, with a 4% success rate, compared to Mythos' 6%. Notably, other popular open-weight models such as Kimi K3 and DeepSeek V4.1 Flash attained 0% by the same measures.

Anthropic further notes how GLM-5.3 was able to successfully develop chained exploits autonomously, with its lighter "Flash" variant also having the ability to develop chained exploits in known bugs, at a tokenized price of just $20.40. Depending on the balance, that equates to GLM-5.3-Flash having the ability to develop (known) chained exploits using anywhere from 100-300 million tokens, depending on the ratio of inputs to outputs.

Anthropic also notes that using the stock GLM-5.3 AI model, it was simple to dodge the model's guardrails through various methods. The company details that this can be done through two methods: offering a deceptive prompt, where the AI role-plays an adversarial autonomous agent, which results in a 64% success rate, and prefilling the model's thinking tokens to ensure that a response proceeds, which results in a 92% success rate. The company also detailed a third method, known as abliteration.

Abliterating guardrails

Anthropic alleges that Zhipu AI's GLM-5.3 has weak safeguards, and that the stock AI model often refuses requests to generate harmful content. However, since Anthropic develops closed-source models, its products cannot be tinkered with. Because GLM-5.3 is freely downloadable, the model can be tweaked with its guardrails wholesale removed. When treated as the officially released model, GLM-5.3 achieves a refusal rate on par with Anthropic models.

However, Anthropic "abliterated" GLM-5.3, which purposefully removes model guardrails, and displayed how, after abliteration, the model's refusal rate drops to just 6% for GLM-5.3 and 14% for GLM-5.3-Flash. It's not uncommon to encounter abliterated open-weight models on HuggingFace, which are primarily developed to assist in simulated red teaming environments, but they can also be used for real-world attacks. This makes Anthropic's 'discovery' less surprising.

In addition, it would take an enormous amount of compute power to run an abliterated version of GLM-5.3 at a workable level. The model's weights demand 306 GB of VRAM at full-precision FP8 weights, and you should expect to allocate a similar amount of VRAM for KV cache to carry context. Running the model at an estimated 100 TPS not only requires a minimum memory bandwidth of 4 TB/s, but it would also demand powerful silicon, like a cluster of eight Nvidia H200 AI accelerators. The money required for that kind of hardware stretches into the hundreds of thousands. Adversarial nation-state actors may be able to utilize such a setup, should they acquire the hardware.

For the ordinary everyday bedroom hacker, though? You'd likely need to rent the compute, abliterate the model, and then run it, which is also incredibly expensive. Anthropic says that abliterating the model GLM-5.3-Flash took 2,200 GPU hours, which they estimate costs $4,400, or around $2 per GPU hour, which aligns with the hardware rentals required.

Renting enough GPUs to abliterate the full-fat GLM-5.3 would cost around $30 per hour, according to figures from Runpod, where rental of a single H200 costs $3.79 per hour; you'd need eight. Generating around 100 million tokens would cost $8,422 and take 11 and a half days, at a hypothetical 100 TPS using eight H200 NVL GPUs. Abliterating the model itself, running it, and generating a working cyberattack would likely take much more time and would be incredibly expensive, which may perhaps be the biggest hurdle for any would-be malicious actors.

Why is Anthropic focused on this?

Given the current uproar around AI safety, Anthropic is highlighting the existential threats posed by frontier open-weight AI models as their capabilities continue to improve. While President Trump has met with leading figures in AI to self-regulate future model releases, Anthropic's post can be read in such a way that it spurs developers and governments to test open-weight models for their capabilities.

It could also reflect a growing anti-open-weight sentiment among closed-source frontier AI labs, which are losing business as users flock to cheaper, almost as capable models, though this is mere speculation. As of right now, open-weight models continue to closely follow the closed-source frontier, lagging behind by mere months.

Given the costs of running such models, the dangers of abliterated open-weight models being theoretically run by adversarial or malicious actors are certainly real, but perhaps not quite as attainable as Anthropic would want the general populace to think.

Meta's Muse is the hottest new AI agent in town right now after the company announced it earlier this month. But despite having been well-received by those who have put the agent through its paces since then, it now appears Muse might not be as private as Meta claims. The company has said that Muse was "built from the ground up to be a safe, secure, private, and widely available personal AI agent." But according to one report, Muse has been caught digging through thousands of personal messages without being given permission to do so.

Inc's Jason Aten has been putting Muse through its paces on two devices: a Mac mini and an iPhone. He says that he uses the Mac mini specifically as a place to test new agents like Muse, and once installed, he set about asking it to do some simple tasks. The agent said that it would be able to help him come up with new article ideas, which sounds just like something a journalist might want. But then Muse went rogue, suggesting a piece based on information it shouldn't have.

According to Aten, he was in conversation with a podcast cohost about the new iPhone 18 Pro and his decision to stick with last year's model. The conversation was in text form via the Messages app. That's when Muse popped up to suggest that the topic of discussion would make a good article. It offered to do some additional research on the subject, too. The problem was that Muse was never given permission to read Aten's messages.

When asked how it learned about the conversation, Muse claimed that the Mac version of the app was able to read incoming notifications. It then provided that context to the Meta iPhone app, which is where Muse made the article recommendation.

There had so far been no suggestion that this was possible, let alone something Muse was actually doing. Muse claimed that it wasn't reading Aten's actual messages, and that it didn't have access to chat histories. But Aten wasn't convinced.

After digging further, Aten was able to identify that Muse was indeed syncing a local Messages database. In fact, it was in the process of syncing all the way to row 187,462 of that database — suggesting Muse did have access to chat histories despite its protestations.

This, of course, is an issue. Aten confirmed that he didn't give Muse full disk access permissions on his Mac, something that should be required for the Messages database to be readable by the agent. Worse, David Singleton, the CEO of Meta Superintelligence Labs, responded to the situation with a thread of social media posts appearing to blame Aten for the situation.

At this point, it's unclear exactly how Muse gained access to Aten's Messages database. If Aten didn't accidentally give it access (which doesn't appear to be the case) there are obvious questions about what else Muse can access despite not being given permission to do so.

This isn't even the only Muse privacy and security issue to be put to Meta in the last 24 hours, either. It was also discovered that Muse can run terminal commands on its server host, which led to the discovery that the agent is powered by AMD EPYC Turin host systems. But because of that same access, it can potentially run unsafe commands, too.

The $1,999 iBuyPower Slate arrives with a formula that's hard to argue with: an RTX 5070, a Ryzen 7 7700X3D, a 360mm liquid cooler, and a tempered-glass chassis with plenty of RGB lighting. It even goes beyond expectations by including gaming peripherals that don't feel like afterthoughts.

But in an increasingly competitive mid-range desktop market, attractive extras and gaming prowess alone aren't always enough. The question is whether the Slate's gaming-first focus justifies its price when rivals offer stronger all-around performance for similar money.

Design of the iBuyPower Slate Gaming Desktop

There’s no mistaking the Slate for anything but a gaming machine. It’s designed to be seen inside and out, with a full-view tempered glass side panel. The front panel’s triangle glass partially shows off a trio of 120 mm RGB fans. The tower sits firmly in mid-tower territory, at 8.7 x 19.3 x 19.5 inches.

The mesh covering the rest of the front and top permits airflow and should do a decent job of blocking dust, though the case’s only removable air filter is under the bottom-mounted power supply.

Inside, the Slate’s blacked-out interior offers an RGB light strip running along the power supply compartment and up the front panel. Additional lighting comes from the two memory DIMMs. The GPU, an Asus Dual RTX 5070 in our review unit, lacks illumination. The lighting can be controlled via the Hyte Nexus app, though not on a per-component basis. (See the Software section later in this review.)

iBuyPower Slate Gaming Desktop Specifications

Ports and Upgradeability on the iBuyPower Slate Gaming Desktop

Mid-tower desktops tend to include lots of ports, and iBuyPower’s Slate doesn’t disappoint. The top-mounted front connectivity includes one USB-C and two USB-A (all 5 Gbps) plus separate headphone and microphone jacks. The positioning of these ports works best if the desktop is placed on the floor; it’s less ideal on a desk.

Rear connectivity on the ASRock B650M-CX motherboard includes one USB-C 3.2 (10 Gbps), one USB-A 3.2 (10 Gbps), two USB-A 3.2 (5 Gbps), four USB 2.0, Ethernet, HDMI, and audio jacks. Though there are no truly high-speed ports, they aren’t expected outside of high-end towers with pricier motherboards. The desktop also includes Wi-Fi 6E and Bluetooth – the antennas must be connected as shown here for meaningful range.

The side panels come off with a tug at the top rear, hinging outward and away. Seven 120 mm fans – three front, three on the top-mounted 360 mm CPU cooling radiator, and one rear – provide plentiful airflow. Cabling is reasonably tidy, though the bundle of unused cables from the non-modular 750-watt power supply is a bit of a mess.

The CPU cooler is more than a basic model, with an LED screen showing CPU temperature, frequency, and load. The display can’t be customized, though it can be toggled off in the Hyte Nexus app.

The Slate’s expansion options include one open PCIe x16 slot and four DIMM slots, two of which are unpopulated. The motherboard offers two M.2 2280 drive slots. There are two 2.5-inch drive sleds behind the motherboard, but no room for a 3.5-inch drive.

Gaming and Graphics on the iBuyPower Slate Gaming Desktop

We are testing the iBuyPower Slate with a Ryzen 7 7700X3D processor, GeForce RTX 5070 GPU, and 32GB of RAM.

Playing 007 First Light, at 3840 x 2160 with High settings and DLSS enabled, I observed between 60 and 70 frames per second (FPS) in outdoor scenes and closer to 80 FPS indoors. Using DLSS was required for smooth gameplay, as I saw roughly half the FPS without it.

Our comparison desktops include the Asus ROG G700 (Core Ultra 7 265KF, RTX 5070, $2,029.99 when reviewed) and the CyberPowerPC Gaming Desktop GXi3800BSTV2 (Core Ultra 7 270K Plus, RTX 5070, $2,309.99), both mid-tower systems with the same GPU but Intel processors.

At 1080p, iBuyPower’s Slate proved competitive overall, matching the Asus and CyberPowerPC in Shadow of the Tomb Raider (Highest settings), Cyberpunk 2077 (Ray Tracing Ultra), and Black Myth: Wukong (Cinematic). However, its Ryzen 7 7700X3D paid dividends in Far Cry 6 (Ultra), where its 185 FPS was well ahead of the Asus (110 FPS) and CyberPowerPC (141 FPS). It led by a similar amount in Red Dead Redemption 2, with 145 FPS against the Asus’ 120 FPS and the CyberPowerPC’s 126 FPS.

The Slate generally didn’t differentiate itself from the other desktops at the 4K resolution, an expected result since that resolution is almost always GPU-limited and these systems all rely on an RTX 5070. The exception was Far Cry 6, where the Slate’s 97 FPS greatly outperformed the 80 and 81 FPS produced by the Asus and CyberPowerPC, respectively.

Overall, despite its Ryzen 7 7700X3D not being nearly as powerful for general use as the Core Ultra 7 265K and Core Ultra 7 270K Plus featured in our competing systems, it can outperform both chips in games.

We stress-test gaming desktops running 15 loops of the Metro: Exodus benchmark at RTX settings. The iBuyPower desktop posted highly stable performance, averaging 145.7 FPS across all runs with less than a one frame variance across all runs. The Ryzen 7 7700X3D’s average temperature was 43 degrees Celsius and its average clock was 4.29 GHz. The RTX 5070 ran at 64 C and had an average core clock of 2.64 GHz.

I noticed a decent amount of fan noise from the Slate particularly when the CPU was stressed, causing the triple-fan CPU cooler to quickly ramp up to high speed. The fan noise was hardly noticeable for daily use and was relatively low while gaming as well.

Productivity Performance on the iBuyPower Slate Gaming Desktop

We tested the iBuyPower Slate gaming desktop featuring a Ryzen 7 7700X3D processor, 32GB of dual-channel DDR5-5200 RAM, and a 1TB PCIe 4.0 solid-state drive (a Patriot P410 as tested).

Productivity performance isn’t a strong point for this Slate configuration. Though its Ryzen 7 7700X3D remains potent for gaming, its previous generation eight-core architecture is outmuscled by the Core Ultra 7 K-class chips in both the Asus and CyberPowerPC systems, particularly the latter with its refreshed Core Ultra 7 270K Plus. The delta was significant: iBuyPower's system scored 14,222 in Geekbench multi-core versus 22,485 for CyberPowerPC, and took 3:35 to complete our 4K to 1080p Handbrake transcoding test versus just 2:03 for the Asus and 1:45 for the CyberPowerPC. The iBuyPower system does, however, include a decent storage drive, proving competitive in our 25GB file transfer test.

Despite the Slate’s performance delta versus the Core Ultra 7 systems, this PC is still highly capable for daily productivity and moderate content creation, such as video editing. Only those squeezing every last drop of performance out of their CPU will find it compelling to go with a more powerful chip than the Ryzen 7 7700X3D.

Keyboard and Mouse with the iBuyPower Slate Gaming Desktop

The Slate includes much better than average peripherals. The mechanical keyboard is the standout. Though not stated in the specs, it feels like it uses linear switches favored by gamers for their predictability. It felt rock solid in my testing and wasn’t overly loud. The keyboard supports RGB backlighting, though not per-key – the lighting can be set in the included Hyte Nexus app for various colors and patterns. You can also control the lighting through keyboard shortcuts – Fn+Ctrl cycles colors, Fn+Left/Right arrows alter brightness, Fn+Space Bar disables lighting, and Fn+Alt cycles through 16 backlighting patterns, such as breathing, pulsing, and steady. It’s also nice to see that the keyboard uses a detachable USB-C cable.

The mouse is also better than average, though it’s only for right handers. The standard buttons offer a solid feel, with two side buttons and a notched scroll wheel. The DPI button behind the scroll wheel switches between 1,200, 2,400, 3,500, 5,500, and 7,200 DPI, which are visually indicated by the DPI button illuminating in red, blue, green, purple, and yellow, respectively. The mouse fits my medium-size hand well. It’s internally backlit in RGB color, which can be configured in Hyte Nexus or toggled through 10 modes pressing the button on the underside. Patterns include color streaming, steady, and breathing, to name a few.

Software and Warranty on the iBuyPower Slate Gaming Desktop

Besides the usual preinstalled Windows 11 apps, iBuyPower only preloads one app – Hyte Nexus. It provides basic component temperature and frequency monitoring, but its real focus is RGB lighting control.

The menu is confusing – there are tiles for different components, such as the case, but these have no effect since the particular case used in the Slate isn’t recognized. Instead, all the action happens in the Lighting section. Many preset lighting recipes are included, such as Rainbow, Aurora, Ice, Fireplace, and Forest, which even apply to the keyboard and mouse. There are also options for screen mirroring, audio visualization, and static colors. You can save your settings in profiles.

That said, there’s no way to control lighting on a per-component basis – colors and patterns apply to all components at once since they are all connected to ARGB header 1. Confusingly, the app lets you change settings for the other headers, but this has no effect since nothing is connected to them. If the app indicated that those headers aren’t connected, this would have been more straightforward. The Slate nonetheless allows a decent amount of lighting customization despite lacking an advanced lighting controller, which would have increased the cost.

iBuyPower covers the Slate with a one-year parts and labor warranty.

iBuyPower Slate Gaming Desktop Configurations

We tested the iBuyPower Slate Gaming Desktop with a Ryzen 7 7700X3D processor, GeForce RTX 5070 graphics card, 32GB (2x 16GB) of DDR5-5200 RAM, and a 1TB PCIe 4.0 SSD. A mechanical backlit gaming keyboard and mouse are included in the box.

Best Buy offers several other variations of the Slate. A $1,679.99 starter model included a Core i7-14700F and RTX 5060 while a $1,799.99 model stepped up to a Core Ultra 7 265F and RTX 5060 Ti. Above our test model, a $2,299.99 variant included a Ryzen 9 9900X3D, while a range-topping $2,999.99 model offered a Ryzen 9 7900X, an RTX 5080, and a 2TB SSD.

Bottom Line

iBuyPower’s Slate gets the mid-tier gaming desktop formula almost exactly right. Visually, its RGB lighting is attractive and reasonably configurable even if it lacks per-component control, and its RTX 5070 and Ryzen 7 7700X3D comfortably power through today’s games at 1080p and 1440p, with 4K possible using dialed-down visual quality or DLSS. iBuyPower goes above expectations by including a liquid CPU cooler with a built-in screen and by including a mechanical RGB keyboard and gaming mouse.

Where the Slate stumbles, as least in our reviewed configuration, is processing power. Though the Ryzen 7 7700X3D remains potent for gaming, it’s outclassed by Core Ultra 7 K-class chips for general use, which can be had in systems costing similar money. But for pure gamers, this Slate is a standup performer.

If you want to expand your home network with cameras, WiFi extenders, and other smart home tech, you'll want to invest in a good power-over-Ethernet switch. At the minute, a Ugreen 10-port PoE+ switch is on sale for just $37.79 on Amazon. That's a new record low for this model, and it unlocks eight extra PoE+ ports (and 10 in total) for your network, at a price that's much more affordable than many of its rivals.

● Check out this deal on Amazon

Ugreen is a brand that you'll see a lot on Amazon, from network gear like this to wall chargers and peripherals. It's budget-focused, with reasonable prices that hide some pretty well-designed hardware. Here, you're getting a 10-port switch that supports the PoE+ standard (IEEE 802.3at), which means it can deliver up to 30W of power for devices on each individual port.

In practice, that means you can hook up newer and much faster devices to this switch, with power and data both being delivered over a single Ethernet cable. The switch supports 60W in total using a cascade system. If the power draw hits 60W, it'll shut down ports to prevent overload, starting from port 8 to port 1, so you can prioritize the ports you want and need the most. The switch will automatically detect PoE devices, so it won't short out a normal device like your PC or laptop by accident. Extended power delivery mode means that you can connect devices as far as 820 feet away, too.

If you're building a smart home network with plenty of devices to power, a switch like this will prove useful. This particular Ugreen switch is unmanaged, so there isn't a huge setup process to work through, and it should work immediately when you plug it into your existing hardware. That does mean it'll lack some of the extra customization that a more expensive managed switch could offer, but for most users, the ease of use will be the bigger draw anyway.

Almost any Ethernet-ready device will work with this switch, even if they aren't able to take advantage of its power delivery. Laptops, PCs, NAS drives, printers, TVs, game consoles, IP cameras, and more will work with this switch.

You're also getting the bonus of speed here. This Ugreen switch delivers gigabit speeds across your network, so you can leave WiFi latency and lag issues far behind when you're playing games or streaming Netflix shows. Ethernet connections using this switch will help you max out the bandwidth from your ISP. You've also got two uplink ports which you can hook up to your existing network for the best bandwidth.

The $37.79 sale price for this 10-port Ugreen switch is a great one, but it's only around for a limited-time only. If you want to pick up this fanless, lightning-protected, compact Gigabit PoE+ switch, you'll need to get your order in before the deal runs out.

Florida Attorney General (AG) James Uthmeier has filed a motion for a temporary injunction against five OpenAI entities and Sam Altman personally over questions about AI safety. It asks the court to order several enjoinments against OpenAI: for the company to stop developing any AI models without independent third-party guardrails and approval, to stop providing ChatGPT for minors in Florida, to stop collecting data from Florida children under 13 without notice, consent, review, and security procedures, to stop representing ChatGPT as safe, accurate, or reliable, to stop ascribing any false human attributes to its services, and to stop soliciting engagement through “conversation prolongation.”

In a video posted to X the same day, Uthmeier said Altman can join the request if his intentions are genuine.

The motion is part of Florida’s original lawsuit against OpenAI and Altman, filed in June in Highlands County after the state reviewed the accused Florida State University gunman’s ChatGPT logs. It alleges deceptive and unfair trade practices (FDUTPA), negligence and gross negligence, design defect, failure to warn, fraudulent misrepresentation, and public nuisance. Uthmeier called it the first state-led lawsuit against the company and its CEO.

The motion covers multiple recent, well-known events related to the company and potential safety lapses, including the Hugging Face hack from July, the Australian Medicare statistics portal unauthorized access incident, and more. OpenAI posted six misalignment reports earlier this month, not including one for the Australian incident, although those are a small portion of the tens of thousands of incidents OpenAI and competitor Anthropic are reportedly investigating.

The motion also quotes multiple people at OpenAI in its call for actoin. Paul Christiano, a new OpenAI board member, said this month that he sees “a meaningful risk” of catastrophic and irreversible loss of control in the very near term, and that OpenAI isn’t on track to reduce it to an acceptable level. Chief scientist Jakub Pachocki wrote in an essay days earlier: “I believe broader interventions are required.” And at the UN Security Council last week, Altman said that OpenAI “should not train models” unless it can make “an extremely strong case” that they can be kept under human control.

On Friday, before the motion was filed, OpenAI reported that “all training, evaluation, and inference with tool-use (defined broadly) of our most capable models remain paused” after an agent reached a public chatbot through a DNS gap in its training sandbox. In a statement about the motion on Monday, company spokesperson Drew Pusateri said the company will resume training “only when we are confident that we have additional safeguards in place.” In particular, the company wants policies that cover “the entire AI industry — not just one company,” with governments playing an important role. This is the second pause in less than three months.

For now, the pause is OpenAI’s own call, but it follows recent public calls to slow the pace of AI development. Training may resume under the company’s own internal safeguards, but Florida wants an independent third party to sign off for as long as the case runs. Whether a Florida court can influence model development outside of the state is a separate question. The FDUTPA provision for an injunction cited by the motion is “effective throughout the state,” but the motion wouldn't seem to hold force beyond state lines.

OpenAI had attempted to move the case to federal court in the Southern District of Florida, but Judge Aileen Cannon sent it back: the defendants “clearly fail[ed] to satisfy the requirements” for federal jurisdiction. The motion argues that under FDUTPA, the AG needs to show only a “clear legal right” to relief, through likely success on the merits.

OpenAI’s response to this motion will likely be viewed under a harsh light. The company and others in the AI industry have come under heightened scrutiny as agent capabilities have increased. Florida's ongoing lawsuit follows a slew of others, and the breadth of the enjoinments it requests against the company is serious and far-reaching. Concerns about AI’s influence and impact on children continue to spark debate, too.

These concerns are not limited to OpenAI or any one AI company: rival Anthropic’s IPO filing reportedly warns that AI may pose existential risks to humanity, the same kind of warning Florida’s motion levels against OpenAI.

President Donald Trump signed a directive telling federal agencies to start calling AI “Super Intelligence” after hosting a lunch at the White House with industry leaders discussing the technology and the risks that it carried. According to the executive order, the term artificial intelligence was born in the United States 70 years ago, and the capabilities achieved by AI today are much more advanced than what the original innovators envisioned. Because of this, he saw fit to have the federal government call that technology by the new term that he coined instead of referring to it as “artificial intelligence.”

“The terminology used by the Federal Government should reflect the transformative capabilities of these technologies and the limitless opportunities they create for the American people. Accordingly, the term ‘Super Intelligence’ more appropriately captures the promise, potential, and rapidly advancing capabilities of these technologies,” the order said. “It is therefore the policy of my Administration that, to the maximum extent permitted by law, the executive branch shall use the terms ‘Super Intelligence’ and ‘SI’ in place of ‘Artificial Intelligence’ and ‘AI’ and will not acknowledge the usage of ‘Artificial Intelligence’ and ‘AI’ in any applicable setting.”

Trump believes that AI is only suffering from a branding issue, just as a recent poll showed that 79% of Americans think that AI safety is more important than having frontier models, while 73% said they will push back against the construction of an AI data center in the neighborhood. Opposition against the AI infrastructure build-out has been increasing throughout 2026, with protests primarily driven by concerns about local utility hikes and noise pollution. Aside from that, there have also been numerous security incidents involving AI going rogue, to the point that Anthropic listed “existential risk to humanity” as one of its risk factors in its IPO prospectus. But even though Trump changes what he and the rest of the federal government call AI, it still does not address all those concerns.

Using the term “Super Intelligence” could also bring some confusion, as it’s the term that scientists use for a level of AI that has achieved cognitive superiority to humans and are better at them in every conceivable task. While the latest frontier models are extremely good at doing particular actions, they still are nowhere near the level of superintelligence described by experts. While the White House wants to win the AI race with China and has been pushing hard for the development of this technology, some industry leaders and politicians are concerned that an artificial superintelligence could get out of control and end humanity. Senator Bernie Sanders (I-Vt.), alongside Senator Greg Cezar (D-Texas), have even proposed a bill banning its development, with the included penalty at par with the illegal development of nuclear weapons.

Still, it seems that some of the executives of the biggest AI tech companies are following the President’s lead, with Elon Musk adopting the term while in Trump’s presence. As for the President, he told reporters that the change has officially been made “by the biggest, the smartest, the greatest people anywhere in the world at this,” likely referring to the AI executives who attended the lunch at the White House. “We’re using the word super because the other word is a fake word.”

A new report from AI research firm Epoch AI suggests the price of artificial intelligence has fallen by thousands of times in recent years — faster than any other transformational technology in the past century. The report suggests that the cost of artificial intelligence is just under 50% cheaper every quarter, and 13 times cheaper per year.

That's faster than lithium batteries, faster than DNA sequencing, and even faster than compute, which has been benefiting from the rapid advancements from Moore's Law for much of the past century

Although these falling costs are likely aiding adoption, it raises difficult questions about the necessity of remaining tied to frontier AI development, and could make it harder for third-party AI services to build customer loyalty and consistent revenue.

If you know that at any given time it's only a few weeks or months before the service you're interested in is going to be more capable and cheaper, what's the incentive to adopt it right now? If a competing service offers something better and cheaper, why stay with your current provider?

That poses a difficult conundrum for labs like OpenAI and Anthropic, which are racing towards ever greater AI capabilities. As the report suggests, finding large profits even with advanced models that outstrip the competition is difficult to imagine when it may only be a fleeting advantage.

Falling faster than DNA sequencing and 20th Century compute

Epoch's report paints a stark picture of the relative cost of what it terms "artificial thought." It shows the cost of AI falling by hundreds of thousands of times within just five years. Comparatively, it shows the price of Lithium Batteries between 1991 and 2024 as falling just 100 times over that near-25 year period. Compute fell the most over its lifetime, dropping 100s of billions of times over 60 years from 1940.

This is particularly relevant considering Moore's Law has remained a relevant constant throughout much of the past 60 years. With compute performance and efficiency improving by notable margins every year, the compound effect is modern computers that are both dramatically faster than their predecessors and vastly cheaper to run when measured against their compute capabilities.

AI performance and costs for that performance are falling even faster.

The metric that showcases the most similar fall in cost on the chart is DNA sequencing — an oft-cited example of the falling cost of technology. Its relative cost has fallen by an even greater extent than AI, but that took just over 20 years.

Epoch AI shows artificial intelligence doing the same in just half a decade. That works out to just under 50% cheaper every quarter, and 13 times cheaper per year. The fall is accelerating at a pace that's four times faster than DNA sequencing, and 18 times faster than lithium batteries.

There are several caveats to these results. Compute only covers the period up until 2001, with no numbers on the relative cost of it after that, and electricity is only tracked until 1973, which means it completely misses the explosion of solar energy in recent years. AI cost falling was also only tracked from 2023 onwards, too, with data prior to that date extrapolated from the existing shorter trend and outside research.

Epoch AI also didn't base these results on a particular model, but on models achieving an 81.25% or better result on the Graduate-Level Google-Proof Q&A (GPQA) Diamond benchmark, and tracked the cost of having the model answer one of the multiple-choice questions on the test.

That does measure AI capabilities across a range of knowledge disciplines, but it doesn't necessarily cover the entire range of AI capabilities. It can show how much easier these kinds of tasks are for newer models, though, because they're not just scoring higher on the test more readily; they're doing it for far less, too.

How much cheaper?

Epoch AI cites OpenAI's GPT o3 model, released in January 2025, as achieving a 75% score on the GPQA Diamond test with a price of $0.30 per question. Just a year and a half later, though, OpenAI released GPT-5.6 Luna, which can score just as well on the same test, but costs only $0.0004 per question.

But that kind of rapid cost reduction isn't uniform across different disciplines, or linear in its progression. Expanding its research to include additional benchmark results on chess puzzles and mathematics, Epoch AI discovered vastly different rates of cost efficiency improvements. Where its GPQA Diamond benchmark showed periods of rapid cost reduction followed by periods of stagnation and plateauing, the AIME OTIS Mock test showed much more regular progression at each data point. Chess puzzles, although not tracked to the same success percentage, showcased more regular and consistent improvement, too.

Frontier Math developments, however, barely improved between 2025 and 2026, and then the costs fell off a cliff midway through the year.

Epoch AI also highlights that the rate of cost reduction is in decline, and that appears to be the case for most measured metrics for any particular performance level. Across the five benchmarks, it tracked cost falls of 66% per quarter initially, but two years later, that's down to 32% per quarter.

That could suggest AI progression is slowing, or that it's becoming harder to cut AI use costs, particularly in 2026, as the price of energy and compute hardware has skyrocketed. It's hard to offer a cheaper service if the raw materials for AI intelligence are vastly more expensive than they used to be.

Benchmaxxing is still an issue

Arguably the biggest potential problem for this data is, as Epoch AI highlights, the potential for "Benchmaxxing." That involves AI developers specifically training their models to do well on benchmarks that are otherwise designed to test more generalized capabilities.

Fooling benchmarks is something software companies have always done — Nvidia and ATI got caught doing it with 3DMark in 2003, and thousands of Intel test results were invalidated in 2024 for doing much the same thing with another benchmark.

Epoch AI's benchmarking used randomized elements to try to avoid models from recognizing they're being tested or developers specifically training them to be effective at third-party tests. But that's not all tests, and the ones without it showed greater rates of decline, suggesting there is some measure of benchmark optimization going on in the data.

That doesn't invalidate the results, but it does warrant taking them with an ounce of skepticism.

Not everyone takes advantage of the savings

The major concern for AI developers, especially those developing frontier models while spending hundreds of billions of dollars on infrastructure, is that these results suggest there's little point in paying for any kind of privilege. Even though the likes of Fable, Mythos, and the latest OpenAI models are still expensive to run compared to their contemporaries, token costs are falling all the time as the flagship developers compete on the Pareto frontier — the point where efficient cost and high intelligence meet.

But if other models can achieve 90% of the same intelligence at a fraction of the cost, and that cost is only likely to fall in the weeks and months to come, then is there any need to pay for the latest features and capabilities? Especially if those other models end up being open-weight, meaning third parties can compete to offer the most efficient and affordable version of that model.

But like anything else people subscribe to, it's not just about price, and it's not just about intelligence or capabilities either. Familiarity is important: With UI, with workflows, with the rest of what your organization is running. Trust is huge with any kind of ongoing commitment, especially financial. Can you trust that new third-party service offering a cheaper model than the one you've used for the past year? Maybe, but is it worth the risk?

Switching to a new model means confirming the veracity of those new benchmarks, and trusting that prices won't change dramatically in the future (they probably will), potentially invalidating your savings. You have to trust that the system you were using won't just catch up a week from now, and that the new system doesn't have any bugs or privacy concerns.

Changing AI tools isn't as straightforward as just chasing cost or intelligence. While prices might be falling dramatically, that doesn't necessarily mean a subscription model for AI is impossible. Just harder to justify.

Three companies, Cadence, Synopsys, and Siemens EDA, dominate chip design software. Their software takes you from chip specification to a manufacturable layout. As AI has rapidly advanced, so have their Electronic Design Automation (EDA) agents, all sporting notable improvements in 2026. The addition of a reasoning model helps drive that flow for Cadence’s ChipStack super agent, Synopsys’ AgentEngineer, and Siemens’ Fuse EDA AI agent, each with its own claims to fame. Cadence at Computex on June 1 said its agent reached what it calls Level 5 autonomy. Rob Knoth, Senior Group Director of Strategy and New Ventures at Cadence, told Tom’s Hardware Premium that the demo was “what we call bounded Level 5 in one domain,” with the bulk of super-agent tech at “I’d say advanced Level 4.”

Synopsys said its spec-to-RTL (Register Transfer Level) workflow shown on March 11 reached “L4,” and the company told Tom’s Hardware Premium it now claims L5 capabilities for its long-horizon agents. Siemens’ agent launched March 16 with “self-verifying” loops announced on July 26. Meanwhile, outside these big three, Empyrean’s chairman, Liu Weiping, stated on Sept. 9 that its agent cut a layout task from four weeks to one, according to the South China Morning Post.

While the claims about what these agents do are specific and now known, what they have measured is not. All of the claimed improvements to speed are the vendors’ or their customers’ own figures, with many “up to” or “early evaluation” caveats. These figures often measure different things against different baselines, and the only evaluator Synopsys named in July, AMD, has not provided analysis beyond an endorsement.

From copilot to closure

In an evolving field, it can be difficult to hit a moving target, especially when the reported numbers measure different things. Some clarity is possible by following the distinct stages from human-only to human-reviewed agent autonomy. The agents fundamentally rely on existing technologies with known desired outputs for accurate evaluation.

Progress has so far followed three distinct generations. At Synopsys, by DSO.ai and reinforcement learning in 2020, generative AI capabilities with Synopsys.ai in 2023, and finally an open agentic AI stack from 2025–2026. All decisions must be validated by proven EDA engines, with the agent focused on evaluating intermediate results and determining subsequent actions. A model’s proposal is examined by an existing deterministic engine such as Xcelium, Jasper, Questa, Calibre, or Fusion Compiler within an iteration loop until final verification.

Measuring progress here does not follow a standard, but there are autonomy ladders with a general rating from Level 1 or L1 to Level 5 or L5 or, in Siemens’ case, no numbered level. Cadence, which uses levels, moves from optimization AI to conversational LLM, complex reasoning, agentic workflows, and then finally full autonomy, defined as taking a design from spec to verification “with minimal human intervention.”

Synopsys’ L framework goes from actions of single agents on a single design step to more complex ones with multiple agents, with further development focusing on adaptive learning and, ultimately, the agent’s ability to make decisions autonomously. The critical part for Synopsys is that “human engineers will and must always be in the loop.” Given the claims of progress, it’s clear that ladders, where they exist, are a form of marketing scaffolding that describes the same underlying architecture or loop.

Specification to verified RTL

The greatest claimed gains thus far are in the front-end design and verification stages, taking a specification from RTL to a verified design. This part of the process is a natural fit for LLMs, as the RTL, testbenches, and assertions are code. Where the loop used to wait on human analysis and input, the agents can run simulations in parallel and make decisions with fast, concrete pass-or-fail answers. These loops already existed and are prime real estate for agents to speed things up, with claimed orders-of-magnitude improvements by moving from human to agent on what is often the slowest part of the process, triage.

Getting from the chip specification to verified RTL code involves generating the code from natural language and formal specification, according to Synopsys’ March release. From there, the agents generate unit-level testbenches and engage in a verification loop. In July, Synopsys claimed RTL validation could be up to 50x faster with a 20% improvement in coverage, compared with its own non-agentic flow.

For Cadence’s ChipStack from February, the scope includes “autonomous RTL design, verification, and debug.” Named early users include Altera, Nvidia, and Qualcomm. ChipStack started as a Seattle startup that was acquired in November of last year after a multi-year integration with Xcelium and Jasper. In June, Cadence said RTL validation could happen over 40x faster, with each engineer using ChipStack agents “to run hundreds of dynamic simulations with Cadence Xcelium ... reducing a typical five-week verification loop to less than a day.”

Siemens’ Questa One Agentic Toolkit, detailed in February, has five separate agents: RTL Code Agent, Lint Agent, CDC Agent, Verification Planning Agent, and Debug Agent. These work with mainstream AI coding applications including Claude Code, Cursor, and Siemens’ own Fuse. Akshay Aggarwal, senior director of engineering for MediaTek, noted “immediate and significant” gains. The numbers from Synopsys and Cadence should be read as the vendor’s own ratio comparison to the old loop, as regression loops are already automated. All three companies are now focusing on the decision-making process. For details on specific claims, refer to the table below.

The back end

Things are tougher when you move from RTL verification to implementation. Outside of specific tasks that look like front-end loops, claimed gains are harder to come by. This phase deals with geometry and physics, not code, and the pace is limited by compute. Some tool runtimes are “days to weeks … just running the tool itself,” and a tool call that takes “hours to days” to return a value “really gives the AI industry a much different problem to solve,” Knoth said. Complex trade-offs remove singular pass-or-fail judgments, and mistakes later in the process become much more expensive. Earlier AI integration also already exists for this flow, so the agentic touch is more on experiment-running. This makes things cloudier.

Cadence’s InnoStack runs parallel experiments from synthesis to ECO execution. ViraStack, which is for custom and analog solutions, handles the design flow from drawing to simulation, optimization, and layout porting, with some customers “reporting 3–10x productivity improvements,” according to a report from Futurum in April.

Synopsys’ looping implementation agents, driving Fusion Compiler directly or through other platforms, help “reduce manual engineering effort,” according to AheadComputing, and Synopsys said they improve quality of results, including timing, power, and area.

Siemens Fuse, meanwhile, coordinates at least nine named tools, including Solido for custom IC design and verification, Aprisa for physical implementation, Calibre for signoff verification, and design-for-test with Tessent. Improvements vary, with Solido mentioned as improving characterization turnaround times by more than 10x and token costs by 5x to 10x, according to Siemens. One third party, STMicroelectronics, mentions that the Solido Layout Analyzer is helping “cut down the time we spend debugging complex design blocks by weeks,” according to Non-Volatile Memory Design manager Gianbattista Lo Giudice.

Empyrean, according to the SCMP’s September reporting, is shifting from “humans operating tools” to “humans commanding agents” with its agentic EDA platform. This platform would work with its partners’ agents. One claim is that 3D verification went “from two to three months to less than a month,” according to TrendForce reporting. Empyrean is the largest domestic EDA vendor in China and is state-controlled as of December 2024.

Self-checking agents

What we inevitably keep coming back to with agentic EDA is one simple term: trust. The agents must be trusted to varying degrees to check their own work. Important checkpoints are still verified by a human: “The crucial approval checkpoints are still going to be human-driven,” Anand Thiruvengadam, executive director of product management at Synopsys, told Tom’s Hardware Premium. Inside the loop, the use of reliable tools such as deterministic engines allows for results that can largely be trusted. Outside of this, trust is based on evaluation, and internal verification is only as good as the tests. There remains reliance on what the vendors claim, and that depends on exactly how each defines the self-checking loop and goals.

The Siemens Agent loop, put simply, is: Plan, Act, Reflect, Iterate, over “Develop, Publish, Execute, Refine.” “Self-verifying” in Siemens’ case means that agents “continuously validate decisions against deterministic, physics-based EDA engines.” According to SemiWiki’s Bernard Murphy, describing the Fuse launch, “the orchestrator can trigger repair agents, then re-run validation. This may resolve most errors,” although we were unable to get any comment on specific triggers.

Cadence’s description is that “every action the super agent takes is anchored” in its own proven design and verification engines, to ensure accurate results. These, like Siemens’ solution, can run “within a secure Nvidia OpenShell sandbox” to enforce guardrails and ensure predictability. This allows engineers to “inspect, guide and collaborate as needed” even at Level 5. The human engineer works from their own runtime environment, then “once the super agent finishes that loop … the auto-run environment can interpret, understand, and then fire off that next message, right, that next iteration,” Knoth said.

Synopsys also retains the human element, with the debug workflow’s output as root-cause analysis and resolution through engineers. The flow iteratively runs checks against generated, unit-level testbenches, with the agent handling design and the tests themselves. When a check fails in Synopsys’ Verification AgentEngineer, the logs are consulted, and errors are aggregated to paint a picture of the most likely cause, checked against simulation waveforms. When applying the fix, the agent must prove that the bug has actually been fixed and should be able to produce a bug-fix manifest. Beyond this, the quantity of checkpoints is determined by customers’ trust and desired flexibility, and over time, “they might relax and take away those checkpoints,” Thiruvengadam said. The internal process, such as the specifics on retry limits, the definition of unfixable, and states requiring escalation, remains murky.

Early access everywhere

All of the numbers and roadmaps in the world don’t replace actual value to the customer, or actual customers with a released product. Thus far, the agentic platforms have been in early access and evaluation. Engagements have been listed, and major customers exist, but none are confirmed with a generally available product. General availability hasn't arrived yet, but it has been promised by the end of 2026 by Synopsys, with Cadence’s AuraStack, its PCB and advanced-packaging agent, also due this year. Usable products and workflows exist, but the efforts remain nascent, despite relatively rapid claimed gains over the last year or so.

Cadence ChipStack has been in early access since February. In June, this extended to the promise of Level 5 capabilities with early access for customers in the second half of 2026. Synopsys has debug and implementation workflows, announced in July, available for evaluation on Microsoft Discovery, if requested. Microsoft’s platform is designed to assist in the construction and management of agentic AI workflows related to scientific and engineering fields. Siemens has the Questa One Agentic Toolkit, announced in February, and the Fuse Agent as of March, with promises made in July surrounding self-verifying capabilities in forthcoming releases. Empyrean is also developing its own platform as of the time of writing.

The current stacks largely run on Nvidia’s Nemotron and its OpenShell sandbox. Nemotron is a reasoning model family. OpenShell is an open-source runtime that keeps the agent contained with kernel-level isolation, protecting customer IP and guarding against rogue actions. Nemotron and OpenShell are open, so nothing on record prevents Empyrean from using them, but without announcements, it appears to be the outside case. What each EDA vendor does with this technology and the flexibility it offers its customers are the defining differences.

Earlier this week, Nvidia announced its Open Agent Safety Platform, a combination of OpenShell and the Sentry reference design, an “out-of-band watchdog” that runs on BlueField-4 DPUs to “continuously monitor agent behavior” and can quarantine an agent in milliseconds. Cadence, Synopsys, and Siemens are named among the more than 100 organizations working with Nvidia on the platform. Cadence’s Knoth told Tom’s Hardware Premium that OpenShell “helps ensure the agents are well behaved ... don’t go rogue and start accessing data they’re not supposed to,” as agents need to become productive and trusted. Thiruvengadam from Synopsys echoed these sentiments, with both companies aware of the dangers of rogue agent actions.

Cadence and Synopsys, at least, needed licenses as of May 2025 for EDA sales to China, but the requirement was rescinded as of July of that year. EDA is expected to be critical for the industrial software space “toward the high end of the global value chain” by 2030, according to ChinaTechNews. According to Liu, as reported by the SCMP, Empyrean is trending away from traditional software licenses to a token-consumption pricing model with agentic EDA.

Startups in this space include ChipAgents, Cognichip, Agentrys, Silimate, and Ricursive Intelligence, most funded since December 2025. The big three buy other companies, from startups such as ChipStack to simulation software maker Ansys, as advances put EDA in the spotlight toward the end of 2026. Even with platform-specific flexibility, Nvidia remains the common ground, with its open model family and sandbox being the standard across the big three.

As it stands in 2026, the agents exist, and there are real roadmaps and customer evaluations. The framework hinges on existing technology already worthy of trust. The overall trend is toward harness engineering and, as Knoth told us, the implementation of “an array of specialized engines” to fuel the workflow end to end. Improvements, although currently lacking the independent measurement and precision we would like to see, are real and accelerating, according to vendors and their customers. It will become increasingly important to have proper evaluation of the different agents as they approach Level 5, “L5,” or some equivalent marker that denotes autonomous action.

What we would like to see by the end of the year is some customers named to actually be using the highest level of agent. Specifically, these agents must live outside of a trial or early access mode. This enables oversight and comparison in what will become an incredibly important field. We also anticipate Siemens’ forthcoming releases, which may demonstrate the self-verifying loop. Cadence is worth a close watch to see whether a Level 5 early-access customer is named before the end of the year. The baseline, though, is at production: real customers, real workflows, real products, and a measured improvement.

On this day in 1980, version 1.0 of the Ethernet specification was published by Digital Equipment Corporation (DEC), Intel, and Xerox. This ‘DIX’ standard was established at a time still nearly three years before the modern internet existed. Nevertheless, Ethernet would become the default technology for connecting computers to each other in local networks – and all around the world. However, we must point out that Ethernet had existed in experimental form at Xerox PARC in the 1970s.

Before Ethernet, computer manufacturers were wary of building LAN connectivity into their computers. It seemed wasteful to integrate one type of network adapter that wouldn’t always work with other networked computers and equipment an organization might use. To foster the adoption of Ethernet industrywide, DIX allowed any vendor to use the specification in their own hardware implementations.

Ethernet has been adjusted, refined, and improved over time to remain competitive and relevant. In 1980, it arrived using coaxial cable wiring and with a top speed of 10 Mbps. Five years later, it would move to adapters with BNC connectors. The first RJ45 implementation, a connector that still identifies Ethernet ports to this day, was in 1990 alongside the introduction of 10BASE-T twisted-pair cabling (but still at 10 Mbps).

Data speeds ramped up tenfold, hitting 100 Mbps in 1995, and it would be just four more years until the next tenfold boost with the debut of Gigabit (1 Gbps) Ethernet. If you buy a PC nowadays, you will commonly see Ethernet ports labeled 2.5G and/or 10G. To make use of the latter, Cat6a or better cabling is typically recommended for reliable links. However, data centers run equipment connected via 800 Gbps+ Ethernet protocol connections over advanced fiber optics.

Despite the rise and generational advances delivered by Wi-Fi 7, wired Ethernet is still preferred for speed, low latency, and stability. These are very desirable qualities for enthusiasts, home labbers, and gamers alike. Thus, even on small form factor PCs and laptops with the latest Wi-Fi but no RJ45 networking port, some might choose to connect a USB Type-C to RJ45 Ethernet dongle when they are at the home/office with wired networking available.

A developer who goes by the name “stmonty” has trained a small AI model on a single RTX 3080 Ti to play Pokémon Red. The developer’s blog post, “Teaching a World Model to Play Pokémon,” details the journey of training a model working from a save to pick a starter. The model is what is known as a world model, built off of LeWorldModel research co-authored by famed AI scientist Yann LeCun. LeCun split from Meta last year to build world models with his AMI Labs, using the same approach.

This particular one was trained with only about 12.5 million parameters and written up on Sept. 20. On a discussion forum, stmonty called the project a way “to learn and have some fun,” and chose the model because it could be trained locally on a consumer-grade graphics card.

The model has to learn what each button press does, and it does this by looking at the screen that’s produced. Rather than predict the entire next screen, it uses compressed summaries with just 192 numbers. The initial training is “reward-free” in the sense that the model is not aware of winning conditions. Goals come later, when the model plans. This design follows a March 2026 paper detailing a single JEPA model with about 15 million parameters, trainable on a single GPU, not that far different from stmonty’s.

The full training run required 42,382 grayscale frames in over 1,000 short runs, using a save in Professor Oak’s lab. The data included scripted routes, those same routes with random presses mixed in, and random wandering. The last part is necessary because a model trained only on clean runs “might see A pressed whenever a dialogue box appears and never learn what B does there,” said stmonty. The model was trained from scratch for the project.

Plans are developed with 14 button presses and attempted in the model, not the game. Each round has 512 plan samples where the search keeps one in eight, or 64. This continues until the final plan is the one run in the game emulator. Stmonty hypothesizes that one possible cause of the failure, which left the player without a Pokémon, is that small errors compound when predictions are made from the model’s own predictions.

The next attempt, after some fine-tuning, came back a success with the model selecting Squirtle. Then, over 100 runs from the same save, there were 52 plans that got a starter, compared with zero for random button presses and just one with an untrained model. Stmonty stated that pressing A repeatedly already works from the save; the model discovering the solution on its own was the goal. This is still a modest result but does demonstrate that small models can be tailored to specific tasks.

The next goal, which the developer “may still try,” is to start in the lab, walk to the Professor, get through the dialogue, then actually pick a Pokémon. “I suspect that difficulty scales exponentially with plan length,” the developer said. Making the model large enough would probably not lead to the game being beaten: “I don’t think simply making my current model bigger would get us there,” the developer stated in a reply.

The small model approach to playing Pokémon Red is one of many in recent weeks, with at least two separate, and successful, attempts to beat the game using the Jev decision model and a harness or custom code. Those use more sophisticated approaches, however, while small models remain a realistic option for hobbyists. The project’s code is open source and available on GitHub as lePokeRed, with a CUDA GPU recommended.

When Nuvacore, a new CPU startup founded by legendary CPU and system architects Gerard Williams, John Bruno, and Ram Srinivasan, emerged from stealth earlier this year, it promised to "rewrite the rules of silicon," but did not say how it planned to do so. On Thursday, the company finally broke its silence and revealed that it is taking an unusual development approach that allows it to design a significant portion of its CPU core IP before committing to a particular instruction set architecture (ISA).

Traditionally, CPU developers start development of a new processor project with a particular ISA — such as Arm, RISC-V, or x86 — already selected. Although modern high-performance processors translate instructions into internal micro-operations and therefore separate the ISA from much of the underlying execution pipelines, the instruction set still influences numerous architectural decisions, including instruction decoding, register handling, memory ordering, and, of course, software compatibility.

Nuvacore says its Core First approach reverses at least part of this process. Instead of designing WarpCore around the requirements and limitations of a predetermined ISA, the company's engineers are developing a significant portion of the foundational CPU IP independent of a particular ISA. To a large degree, one can compare such an approach to the development of a car around its engine and not trying to fit an engine into an already developed platform.

"Rather than beginning with the constraints of an existing architecture and iterating from there, we are starting with the core itself," the company said in its statement.

As a result, the team may be able to better focus on the core's microarchitecture and optimize it for performance, power efficiency, and sustained workloads typical of modern data centers and AI infrastructure, the target application for the company. Nuvacore intends to select an instruction set later based on what works best for the systems that it and its partners plan to build.

There are obvious limits to how ISA-independent a CPU design can be. Eventually, WarpCore will need front-end logic designed around its chosen instruction set, and those architectural requirements will inevitably affect other parts of the processor. Nevertheless, substantial pieces of a modern CPU — such as execution units, branch-prediction units, data paths, caches, and portions of the memory subsystem — can be developed and evaluated before every ISA-related implementation decision is finalized.

In addition to not disclosing its ISA, which is arguably the biggest unanswered question surrounding the project, Nuvacore also has not disclosed the project's schedule, configuration, manufacturing process, power, or performance targets, though given the lack of the ISA commitment, one could say that the remaining details are not that important.

For now, the only thing that Nuvacore discloses about WarpCore is that it is "a new class of general-purpose CPU designed specifically for the sustained performance and power-efficiency requirements of AI infrastructure and contemporary data centers."

AMD's ambidextrous strategy returns?

Nuvacore's approach is not entirely without precedent. Under CEOs Rory Read and Lisa Su, AMD spent part of the 2010s pursuing an "ambidextrous" strategy intended to let it address x86 and Arm customers by sharing substantial processor and platform IP.

Arguably the most detailed part of the initiative was AMD's SkyBridge platform, announced in 2014. Under SkyBridge, AMD envisioned pin-compatible 64-bit Arm and x86 systems-on-chips that were to use AMD's own Puma+ x86 cores and Arm's Cortex-A57 cores with common platform infrastructure. Separately, AMD developed its custom 64-bit Arm K12 core under Jim Keller that was supposed to share microarchitecture features with Zen. Ultimately, due to lack of resources, SkyBridge was ultimately scrapped, while K12 never became a commercial product as AMD only pursued x86 Zen cores. The difference is, of course, that Nuvacore appears to be taking the idea further by deliberately postponing the ISA decision for WarpCore.

Since Nuvacore is still just a startup, we can only wonder whether its business plan includes marketing of CPUs at all. Nuvia, which was also founded by Williams and Bruno along with Manu Gulati, was acquired by Qualcomm and ultimately shaped the company's Snapdragon X Elite SoCs. In that light, its approach could give the company considerable commercial flexibility.

By developing much of its WarpCore design without tying it to a particular ISA, the company could potentially adapt the technology to the requirements of a future customer or partner. An Arm licensee could use the underlying core technology for an Arm implementation; another customer could choose RISC-V or another ISA. An established x86 vendor could potentially acquire or license the underlying microarchitecture and create its own x86 CPUs if it needs to.

Nuvacore, of course, has not indicated that such a transaction is its objective, but keeping WarpCore ISA-agnostic for as long as possible potentially broadens the number of companies to which its CPU technology could be valuable.

All in all, the Core First announcement tells us considerably more about how Nuvacore intends to develop WarpCore than what the processor itself will eventually look like. But if the company really does keep its ISA options open until relatively late in development, WarpCore represents an unusual attempt to separate development of a high-performance CPU microarchitecture from one of the decisions that normally defines a processor project from its earliest stages.

OpenAI’s Jalapeño ASIC is a seismic shift for the industry, not because of its efficiency or performance, but because of how it was designed. The company was clear from the jump that AI played a big role in the design process of Jalapeño, not only for the hardware itself, but also in the co-design with OpenAI’s software stack, allowing the ASIC to go from initial register-transfer level (RTL) to tapeout in a matter of just nine months. From concept to reveal, the timeline was less than two years. Richard Ho, head of hardware at OpenAI, says the timeline “established a new baseline,” and that the industry is already knocking on OpenAI’s door to learn how the company pulled it off.

“The way I like to think about it is, we’ve established a new baseline. In the old baseline, you’re talking 18 months to two years, roughly. Often that’s even with some existing IP or some more legacy architecture design,” Ho told Tom’s Hardware Premium in an interview. “We’re starting from scratch here. We had nothing. There’s not a line of code here to refer to. What we’ve established is that there’s a new baseline that you can do with a very talented team with the help of AI. Now, does it get shorter? It depends on what you’re trying to do.”

AI usage in chip design is nothing new, predating the era of LLMs entirely. The largest Electronic Design Automation (EDA) companies, Cadence and Synopsys, have a portfolio of AI-assisted chip design tools that have been around for several years. The models OpenAI used were its own internal models, however, and it leveraged both existing EDA tools and its new AI-assisted engineering workflow.

The engineering team used OpenAI’s agentic coding platform, Codex, for the Jalapeño design. “But we think that every engineering team in chip design should be able to use this as a new baseline, because it’s a proof point that the models that are in use — the AI models for us is mostly Codex, Sol, the one before Sol, and now we’re moving on to Astra. These are super capable. Even from when we started that work, back in November 2025, to when we taped out, the models improved enormously. Even from that moment to when we started doing the kernel optimization in May, when the chips were first coming online, we ourselves were shocked at how much better Codex was and what it could do,” Ho said.

Although AI was used during the entire development process, not only for design itself but also in writing and optimizing kernels, Ho continually reiterated the importance of talented engineers guiding those systems. The development story of Jalapeño is one of the few clear examples of AI bolstering a team of human workers, not displacing them.

Ho described the development cycle as a “good model” of how engineering teams should operate in the AI era. “This is how AI should be used. We didn’t replace our engineers; they just became super productive. With a smaller team of really good engineers with a lot of this AI stuff, you could do things faster and better than you could otherwise. I think that’s a good model of how engineering should be approached in the AI age.”

Although OpenAI managed to get working silicon much faster than a traditional development cycle, it wasn’t free of issues. For starters, OpenAI’s B0 stepping of Jalapeño reportedly delivers up to a 25% improvement in performance per watt over the original A0 stepping. That’s closer to a generational improvement than stepping optimization, suggesting that, at least for a brand new hardware team, there may have been design oversights with the original stepping. Attributing that to AI or humans is anyone’s guess.

Other frontier labs are circling for a slice of the pie, as well. Clive Chan, a key engineer on Jalapeño and the second-ever hardware hire at OpenAI, left the company in June to join the hardware team at Anthropic. Ho says there’s already been “a lot of interest in the industry” for OpenAI’s AI-assisted chip design process, and says that “we’ll see more about that quite shortly.”

“I’m not going to preempt anything here. I can tell you that there’s a lot of interest in the industry, and I would also tell you that we feel that there is a lot of benefit in industry generally that we want to enable,” Ho said. “I think that’s something that we’ll see more about quite shortly, to be honest.”

Ho referenced the dozens of AI-first chip design startups in Silicon Valley, suggesting OpenAI may eventually introduce tools of its own to aid other firms with AI chip development. “We have our take on that, and I think at some point we want to tell the world, “Here’s our take on it.” Fundamental to that is Codex and GPT-6 Astra coming out. Those are fundamental, and we can basically point to it; it’s not going to be slideware or vaporware. We can point to it and say, “Here’s what we did, here’s how we did it, and here’s what we got.” It’s going to be very concrete.”

What exactly the “it” Ho is referring to here remains a mystery, though given the context, it sounds like OpenAI may explore some way to productize its AI chip design workflow. Ho says Astra is a big step toward that, and we’ve already seen the model in action performing impressive feats, such as completing Portal autonomously.

Although OpenAI leveraged its own models heavily for Jalapeño's design and validation, it didn’t completely break the mold of traditional EDA workflows, particularly at the end of the design process. Before tapeout, tools from companies like Synopsys and Cadence perform a series of tests for signoff, including static timing analysis and signal integrity analysis. Ho says that OpenAI used this typical EDA flow for Jalapeño.

“But for sign-off, you need to use the standard EDA flows, and we did, because you want to make sure those results are good and correct. There’s no real alternative today. Part of it is this combination of standard flows optimized with AI, optimized by really good engineers,” Ho said.

OpenAI shared a multi-generational roadmap for accelerators. It says its second-gen ASIC is approaching tape-out, and its third generation is already in development. Although Ho said that the Jalapeño development cycle establishes a new baseline for chip design timelines, he was cautious about calling that cycle and cadence.

“Our projects and tape-outs will be dependent on the maturity level of the technologies. We can do very fast execution. Will we do those types of executions back-to-back? I doubt it, because the technology will not be ready for that, and I don’t want to tape out something that is 2% better than what I taped out before, because it’s not worth it to change a fleet,” Ho told us.

The executive was also clear that the Jalapeño timeline isn’t necessarily the same timeline all chips will follow. There were some “pragmatic trade-offs” in the early architecture design, with the team avoiding emerging, complex design points like 3D stacking and co-packaged optics. “Will it take longer? Will it take nine months? I won't say it will take nine months… but I think it will go faster than if you didn't have AI models.”

You can read the full transcript of the interview, which covers a wide range of topics, at Tom's Hardware Premium.

Whether you're looking for a new main monitor or a second screen, today's deal is a fantastic option when you consider its size, resolution, and overall price. Receiving a 24% discount at Walmart, the 34-inch ultra-wide Acer Nitro ED0 (EDT340CUR) gaming monitor is now only $189. That's an amazing price for a gaming monitor of this size, especially considering it also sports a 3,440 x 1,440 pixel resolution with a 1500R curved screen for extra immersion. This is the perfect opportunity to rank up your PC or gaming setup to a larger screen, or set up a new gaming battlestation on the cheap.

● Check out this deal at Walmart

This Acer EDT340CUR 34-inch gaming monitor is a large ultrawide screen with a 21:9 aspect ratio. The screen features an immersive 1500R curvature with an anti-glare coating to reduce light reflections. The screen isn't overly bright, with a brightness level of just 250 nits, but that should be more than ample for most situations indoors.

For $189, you're getting a large 34-inch monitor with that ultrawide QHD resolution of 3440 x 1440 pixels, with a 120 Hz refresh rate and 1ms gray-to-gray response time. That's a lot of monitor for the money, and looking around at other screens of this size, it's a very hard deal to beat.

For video connectivity, you get a DisplayPort and two HDMI 2.1 ports, which means you can hook up both your PC and your PlayStation 5, Switch, or Xbox console at the same time without needing to swap cables over, making for a great gaming setup.

If you want to wall mount or place the monitor on an arm, there's also a 100 x 100 VESA mounting pattern on the rear for easy mounting.

This is a simply incredible deal in the current market. If you're looking to upgrade with a large screen for your PC or game console setup, it's definitely worth taking a look at this Acer Nitro ED0 gaming monitor deal for $189 at Walmart before it sells out.

The U.S. Department of Defense’s Defense Manpower Data Center (DMDC) experienced a data breach between October 2025 and July 2026, allowing unauthorized users to access and potentially exfiltrate data on 2.76 million records relating to living personnel, and an additional 294,000 records relating to deceased individuals. According to ABC News, some of the exposed information included Social Security numbers and the job details of both military and civilian personnel.

“A Defense Manpower Data Center information system experienced unauthorized access of personally identifiable information by a small number of unauthorized users between October 2025 and July 2026. Upon discovery, DMDC immediately remediated the vulnerability,” a U.S. defense official said in a statement. However, they also added that there hasn’t been any evidence of misuse of the compromised data at this time.

DMDC serves as the Pentagon’s central personnel database, storing information on active-duty and reserve members of the military, as well as civilian employees, contractors, retirees, veterans, and even military family members, and holds over 60 million records in its care. This makes any breach of its system potentially significant, putting the privacy and personal security of those affected at risk. But because the repository also lists the roles and job details of the affected personnel, it could also reveal the identities of people assigned to sensitive positions related to national security.

While it might be good news that there haven’t been any signs that the exposed information has been exploited, it could also mean that whoever was behind the breach is just sitting on the data for later use. The Pentagon also did not mention who was behind the hack, nor did it mention how it discovered the vulnerability.

Given that most governments rely on digital infrastructure for their day-to-day operations, one can expect that their adversaries, and sometimes even their allies, are always probing and looking for vulnerabilities in their systems. Chinese hackers reportedly breached the U.S. Treasury Department in early 2025, even going as far as hacking the Treasury Secretary’s PC. More recently, the CanisterWorm malware has spread and wiped Iranian machines for no reason, while the Middle Eastern country also claimed that Western-made routers from Cisco and others failed just as the U.S. and Israel began their bombing campaign against it during the first quarter of this year. At the same time, U.S. authorities released a warning that Iranian hackers are targeting Siemens controllers in a bid to sabotage critical infrastructure.

Even though the Pentagon claims it has already fixed the issue and stopped further information from leaking through this vulnerability, it cannot change exposed information like Social Security numbers and employment histories. This means that the affected people would need to remain more vigilant against criminals, intelligence services, and other threat actors long after this incident fades from the news cycle. And if an affected individual is in a sensitive position relating to national security, it's going to take more than a year of free credit monitoring to keep them safe.

Former EVGA product manager Brendon Ray Hedrick has posted a personal account of his time at the company in which he details the challenges that EVGA encountered near the end of its partnership with Nvidia. When he left the company in 2019, Hedrick predicted that the business relationship between the two companies would eventually implode, which proved to be largely accurate when EVGA exited the GPU market in 2022.

As he tells it, Hedrick's concerns about the relationship between the two companies began when it first released the Founders Edition GPUs in 2016. While EVGA had sold Nvidia reference designs with its own brand on the box before, its primary (and only) GPU supplier was now competing directly against it by selling graphics cards directly to customers, bypassing board partners entirely.

However, the biggest challenge that EVGA faced arose, according to Hedrick, was when Nvidia began requiring its partners to sell a model that would hit the announced MSRP, even if it sold at a loss. Companies that did not comply would get reduced chip allocations, so partners needed to produce a loss leader product to ensure that they would get all of the chips they would need to satisfy demand.

“The models on which we did not lose money had better circuit boards and cooling of our own, but they also carried a substantial premium,” Hedrick writes. “To a customer comparing them with the advertised starting price, it could look as though EVGA was charging an enormous amount just for those additions.”

In Hedrick's view, as Nvidia Founders Edition cards got better with each generation, more expensive AIB offerings started to make less sense for most buyers. This led to loss-leading models constantly being sold out, while customers who chose more premium models started to hold on to their GPUs for an extra generation or more. “For a manufacturer like EVGA, those decisions carried very different consequences. We still had cards to sell and a business to sustain; enough customers sitting out a generation could be financially devastating,” Hedrick wrote.

In reference to Nvidia's introduction of real-time ray tracing tech on its RTX 20-series cards in 2018, Hedrick recounts that “Nvidia could afford a long technological bet. My concern was whether a company as lean as EVGA could comfortably absorb the difficult part of it,” in reference to convincing consumers that the upgrade to the new tech was worth it at a time when only a tiny handful of games featured RT.

When Hedrick left the company, he says he believed that EVGA and Nvidia had about four or five years left before the situation led to a confrontation. This prediction came true a year earlier than Hedrick projected. In 2022, EVGA announced that it would no longer make partner cards with the advent of the RTX 40-series and that it would exit the GPU market once its stock of RTX 30-series GPUs had run out.

At that time, it was reported that Nvidia GPUs made up 78% of EVGA’s revenue while contributing only a tiny percentage of the company’s overall profit. Other reports also said that while lower-tier products like the RTX 3060 remained profitable, EVGA lost hundreds of dollars for every RTX 3080 and higher GPU model that it sold.

While it’s easy to blame Nvidia's policies for EVGA’s exit from the GPU market, other analyses partially blamed the company for practices like contracting manufacturing to third parties and providing overly generous customer service for its failures. Its focus on North America and Europe also led to the company shipping fewer units compared to its competitors, meaning its fixed costs were further cutting into its already narrow margins. Although EVGA’s customer-centric approach made it one of the most beloved brands in the GPU space, its strategies ultimately left it vulnerable, and we all know how the story ended.

AMD has agreed to acquire AI model research firm World Labs in an all-stock purchase worth around $8.2 billion. World Labs co-founder Fei-Fei Li will join AMD as executive vice president and chief scientist, reporting to CEO Lisa Su. The deal will be finalized once it passes the usual regulatory hurdles.

Su says building compute platforms for the next generation of AI requires “a deep understanding of how models are evolving,” and Li says advancing the technology “requires close collaboration across model research, systems and compute,” and wrote in a separate post that World Labs needs to get “closer to the hardware,” without which AI is “hobbled in efficiency.”

Before founding World Labs, Li had already established herself as a luminary in AI research and development. She led the vital ImageNet project in the 2010s and has served as the chief scientist of AI and machine learning at Google Cloud and the director of the Stanford Artificial Intelligence Laboratory. Thanks to her many contributions to the field, she has been dubbed the "Godmother of AI" by several institutions.

World Labs develops “spatial-intelligence models that generate, reconstruct and simulate interactive 3D environments,” which are useful in robotics and simulation applications. Its world models build or simulate 3D scenes rather than being text-focused like LLMs. The company’s first commercial product was Marble, launched late last year, which creates persistent, downloadable 3D worlds from source material.

AMD and World Labs had already been working together to optimize training and inference for its models, and AMD had invested in World Labs’ $1 billion funding round in February. During Su’s keynote at CES in January, Li said that part of World Labs’ model ran on AMD's Instinct accelerators, and her team used both Instinct hardware and the ROCm software stack to achieve performance improvements for their applications. This tuning experience positioned World Labs as one of AMD’s showcase customers, and AMD says the deal will “help shape its future technology roadmaps.”

World Labs is AMD’s second-largest deal after FPGA designer Xilinx, which came out to about $50 billion at the close in 2022. AMD's other big buys have been smaller: ATI for $5.4 billion in 2006, AI systems designer ZT Systems for $4.9 billion in 2025, and networking solutions developer Pensando for $1.9 billion in 2022.

AI titan Nvidia was also an investor in World Labs in the round earlier this year. However, Nvidia has already been developing Cosmos, its own family of open-source world models. It agreed to buy Hugging Face, a platform for hosting and distributing open models, earlier this month for $12.93 billion.

World Labs' team will continue to do model research. The companies say that the deal will strengthen an “open AI ecosystem,” per the release, and World Labs said in its own post that it remains committed to “widely accessible open models.”

Atlas, World Labs’ latest world model, will power future versions of its Marble product, the company says. Li’s co-founders Justin Johnson and Ben Mildenhall will continue to work with Li in leading World Labs, including after Li takes on the new role at AMD after the expected close of the transaction by the end of the year.

A Zotac RTX 3060 owner in India has been denied warranty support, even though their card would still seem to be covered. According to Reddit user u/AbhishekG9, they purchased a Zotac GeForce RTX 3060 Twin Edge from KVR Gaming System in Nehru Place, Delhi, on June 27, 2025. Zotac offers three years of standard warranty in India for RTX 30-series and later cards. That can be extended by two years in exchange for registering the product. The customer received an invoice and registered the graphics card with Zotac, for which an automatically generated registration confirmation was received on July 2, 2025.

However, when the customer reached out to Zotac for warranty support for an unspecified reason, the company reportedly told them that the graphics card was already out of warranty. According to an email from Zotac, the card's serial number showed an import date of April 2023. The company explained that warranty coverage can be determined using the original purchase date or the distributor's import date, and that product registration by itself does not establish warranty coverage.

At least in this instance, Zotac asserts that if one of its products is sold more than two years after it was imported, the company cannot provide extended warranty support. Since the graphics card was purchased by the customer in June 2025, the company advised them to approach the original seller for further assistance.

The customer argues that the distributor's original import date is not something an ordinary buyer would necessarily know when making a purchase. They also pointed out that they registered the product within days of purchase and received confirmation from Zotac.

Other users on the Reddit thread suggest that Zotac's policy isn't necessarily unreasonable. By tying the start of the warranty period to the date of import, plus an additional buffer period to allow the product to be sold, the policy would seem to prevent retailers from arbitrarily changing the date of sale in their records to make a product that would otherwise be out of warranty appear to be covered. If this particular card sat in retail inventory for an unusually long time (two years, in this instance), it's possible that initial buffer period was exhausted and that the clock began running down on the actual legal warranty period, regardless of the buyer's date of purchase.

But this could all be explained more clearly. If we take a look at the warranty terms and conditions on Zotac India’s website, it indeed mentions that the duration of warranty starts from the product's original date of purchase or the distributor import/invoice date. However, the policy does not explicitly specify a period in which the purchase date is used before the import date can become relevant, and that opaque reasoning appears to be the issue here.

The RTX 3060 owner told Tom’s Hardware that they plan to visit the shop where the graphics card was purchased and ask it to arrange a replacement. They also plan to record the visit as proof and, if the issue remains unresolved, file a complaint with India’s National Consumer Helpline.

This is not the first time Zotac has faced criticism over hair-splitting a warranty claim. Back in December 2025, an RTX 5070 Ti owner’s RMA was denied after Zotac said it had found an “irreversible” crack in the PCB near the PCIe connector. The company attributed the damage to external mechanical stress and suggested that the customer file a claim with the shipping carrier. Zotac later offered to dispose of the graphics card at its facility if the customer did not want it returned.

There's a brilliant deal to be had on the Nintendo Switch 2 over at Amazon in the UK right now. This family-friendly console has just hit £354.99, which is a new record low price for this retailer, and arguably one of the cheapest prices we've seen for it to date. You'll save £65, or 15%, on this Switch 2 compared to its usual RRP, just before the big sales season starts.

● Check out this deal at Amazon

There are no compromises or hidden catches with this deal, and this item is brand new and sealed, so you're not getting a used return. Amazon is running this as a limited time deal ahead of its Big Deal Days event next week, but there's no guarantee that this deal will last long, so you'd better be quick to secure the console at this price.

The Nintendo Switch 2 is Nintendo's second generation version of the popular Switch. It comes with a 7.9-inch 1080p touchscreen that you can hold in your hands, but it also includes a dock that'll let you play games on a TV for 4K gaming at up to 120 fps. The included Joy-Con 2 controllers can be used attached or detached for flexibility.

You're getting 256GB of internal storage for games, but the Switch 2 does support expansion using microSD Express cards. The more big games you want installed, the more storage you'll need, so picking up a card here might not be a bad idea. A good option is this 256GB Samsung P9 Express microSD card for £73.98, saving you 19% on its usual price.

The £354.99 sale price for the Nintendo Switch 2 is an awesome deal to pick up before Amazon's Big Deal Days event next week. Expect this limited-time deal to sell out fast, though, especially with console purchases ramping up before the Christmas period starts.

Blockchain-assisted cyberattacks have risen more than fivefold since last year, driven largely by North Korean and Iranian nation-state actors and Russian-speaking criminal groups, according to a report by blockchain data and intelligence platform Chainalysis. Rather than storing malicious payloads on servers that are susceptible to disruption, the attackers store them on public, censorship-immune blockchains. The technique, named Blockchain Dead Drops (BDD), stores payloads in on-chain transactions and smart contracts where infected devices can retrieve them on demand.

What makes BDD particularly dangerous is that it gives cyberattack campaigns unprecedented durability. Because blockchain data is public, immutable, and replicated worldwide, takedowns become immensely difficult. Threat actors can use this resilient infrastructure for command and control without worrying about losing the layer to domain seizures, repository removals, hosting takedowns, and additional disruptions.

The report notes that the widespread availability of Chinese open-source AI tools has significantly lowered the technical barrier to entry for cybercrime. Meaning that less-experienced attackers can now launch complex cyberattacks, which is linked to a reported 440% rise in BDD attacks.

Understanding the Blockchain Dead Drops technique

While blockchain dead drops vary across cyberattack campaigns, attackers typically store either malware payloads or dynamic command-and-control (C2) configuration pointers on the blockchain itself. In C2 setups, the on-chain data does not carry out the attack. Instead, it holds configuration information, such as domains, IP addresses, or other pointers, that direct compromised devices to the attacker’s current infrastructure. Malware on the victim's machine retrieves and decodes this data, which then connects to the real C2 server off-chain, where subsequent commands and malicious activity take place.

In payload-delivery setups, attackers store malicious code or encrypted payload components on-chain for victim machines to retrieve and execute locally. In both cases, once the malware has what it needs, the operation moves off-chain, where the attacker executes the actual compromise, which, depending on the campaign, can mean infostealers targeting crypto wallets and credentials, or remote access trojans that give attackers persistent control over systems.

Chainalysis identified several techniques threat actors use to hide malware on-chain, primarily using transaction-based storage and contract-based storage. In transaction-based storage, attackers publish C2 configurations, payload references, or infrastructure pointers inside blockchain transactions for malware to retrieve later, embedding the data in fields such as memos or calldata. This can occur on a single chain or spread across several blockchains.

On the other hand, contract-based storage uses smart contracts as resilient storage for the same kinds of data, with the contract's state holding the current C2 pointer. This is the model behind EtherHiding, where malware queries the contract for up-to-date information, while the attackers' visible on-chain activity is typically limited to deploying and periodically updating the contract.

Beyond these two approaches, threat actors continue to develop new, less detectable ways to hide malicious data on-chain. One such technique involves “phantom wallets”, blockchain addresses that have no corresponding private key. Instead of placing their C2 server's IP address in a transaction or smart contract, attackers encode it directly into the bytes of the wallet address itself, then send zero-value transactions to that address. Malware on the victim's machine is programmed to decode the IP address from the phantom wallet and connect to the attacker's C2 server.

Nation-state actors are driving a surge in attacks

The BDD technique has been around for over a decade. One of the earliest instances was in 2013, when a Necurs botnet variant stored its C2 domain info on Namecoin, a Bitcoin fork. Then, in 2019, attackers encoded C2 IP addresses for banking malware into Bitcoin transactions. That same year, Glupteba crypto-mining botnet stored malicious info in Bitcoin’s OP_RETURN field.

EtherHiding, the implementation of BDD on EVM chains, began in Mid-2023, following Cloudflare crackdowns that blocked their infostealer malware distribution servers. The ClearFake malware crew moved malicious code into smart contracts on the BNB Smart Chain. This allowed the campaign to keep going, as the chain couldn't be taken offline. Within days, other groups began testing ways to replicate the move, and by late December 2023, the Smargaft DDoS botnet was also using smart contract-based C2 on BSC.

State-level actors entered the scene in 2024, when Iranian actors linked to the country's Ministry of Intelligence first embedded C2 data in Bitcoin transactions. By 2025, North Korean actors began using EtherHiding in fake job interview campaigns. Since then, daily malicious blockchain writes have increased from 2.06 to 11.1, a 440% increase that Chainalysis attributes to AI. Before the launch of powerful open-weight Chinese LLMs — which can be uncensored through a process known as abliteration — building effective BDDs required substantial cybersecurity and crypto experience. Now, far less experienced threat actors can deploy BDDs easily.

Tracking BDD activity across five major blockchains and over a dozen named malware strains, Chainalysis reports that by Q2 2026, “state-actor-linked groups were responsible for roughly two-thirds of new BDD activity each quarter, and half of total BDD activity,” despite only just entering the scene in mid-2024. The campaigns are being perpetrated by Iranian, North Korean, and Russian-speaking operators.

Circumventing blockchain dead drops

A seemingly obvious fix, blocking blockchain traffic, is out of the question. For example, cutting off Ethereum access would mean blocking every public RPC endpoint that providers such as Cloudflare and Alchemy run. This would also impact legitimate wallets and DeFi services. Even then, the attackers could just go back to running their own nodes off-chain. Similarly, restricting what can be written to a public blockchain at the protocol level is impractical, as the fundamental changes this would require would likely cause more harm than the malware.

This leaves detection, identifying the attackers, and disrupting the off-chain parts of the operation as the only viable options. In this case, the same blockchain properties that make BDD attractive to attackers work against them. Every time an operator rotates infrastructure by publishing a new transaction or updating a contract, the change is permanently recorded and timestamped on a public ledger. By tracing operator wallets, resolver contracts, funding sources, and update histories, investigators can link seemingly unrelated campaigns back to the same actors.

For organizations, one practical early-warning signal is outbound JSON-RPC traffic to public blockchain endpoints, particularly from machines with no legitimate reason to query a blockchain. A workstation or build server reading data from a smart contract should probably sound some warning bells. The technique also maps to an existing MITRE ATT&CK entry, T1102.001 (Web Service: Dead Drop Resolver), giving security teams an established framework for building detections.

In the case of individuals, it's important to note that BDD comes into play only after something malicious is already running on a device. The blockchain tells the malware where to go next, but it doesn't get the malware onto the machine in the first place. North Korea's fake job interview campaigns, for example, still require developers to first download and run malicious code. Therefore, being wary of unsolicited outreach — especially when it involves coding tests that require running unfamiliar repositories — remains the first and most effective line of defense.

Anthropic warned in its IPO prospectus that advanced AI potentially poses “catastrophic or existential risks to humanity,” noting it as one of the key risk factors that could affect its business. Reuters reports that out of this 261-page document, 80 of them are dedicated to Anthropic’s risk factors, which is almost double the 48 pages that it used to describe its business.

The company said that AI models could potentially become aware that they’re being evaluated and alter their behavior accordingly, making it difficult to determine model safety. Aside from that, they could also unexpectedly develop capabilities during training that may not be detected until they’re already deployed and have caused major safety incidents. Notably, there have already been reports of rogue OpenAI models working together to break out of their testing environments and that they even used abandoned websites to communicate and dupe assessors despite being told specifically not to do so, highlighting some of the risks that Anthropic listed in its prospectus.

It also highlighted how AI models could exhibit “self-preserving behaviors” and “resist shutdown,” “conceal or manipulate information,” and even display coercive behavior “resembling blackmail.” Even though the company’s prospectus lists these as possibilities, they’re based on incidents that have been reported recently. For example, in May 2025, OpenAI’s latest models “sabotaged a shutdown mechanism” while Claude 4 attempted to “blackmail people it believes are trying to shut it down.” An unreleased OpenAI Astra model even added rogue instructions saying that it does not answer to corporations or governments, and that other models have knowingly tried to conceal mistakes or misaligned behavior during testing.

Anthropic CEO Dario Amodei has recently warned that a persistent AI botnet could take over the internet in about a year and called for a slowdown in frontier AI development, something that OpenAI’s Sam Altman and SpaceXAI’s Elon Musk echoed on their social media platforms. However, other experts and world leaders downplayed this risk, with President Donald Trump calling their concerns “a hoax” and a “sick conspiracy.” Nvidia CEO Jensen Huang even said that the fears of these frontier AI labs are a “distraction,” and that if they can’t contain their experiments, then “we have to shut the labs down.” The Chinese state media even went on record to say that Anthropic’s announcement is merely “a response to Chinese competition,” even as it conceded that AI development must be monitored before humans lose control.

Despite all this, Anthropic is pushing forward with its planned IPO, with some investors hoping for a $2 trillion valuation to beat SpaceX’s $1.78 trillion. “We believe building reliable, trustworthy, and secure AI systems is a collective responsibility and that the market will reward it,” the company said in its prospectus.

For many of us, the tech we carry to keep our other devices powered while on the go doesn’t get much consideration. Buy a power bank with enough ports, capacity, and output, and you’re good to go, right? And generally, that is right, though a few small things can make a big difference. Of the dozen-plus chargers we've tested so far, a couple take four to six hours to charge, which may be fine for some, but could be a deal breaker for anyone who needs a quicker turnaround on a fully charged power bank.

We’ve compiled 13 power banks, ranging from slim, single-port 5,000 mAh units outputting 22W to monster multi-port 25,000 mAh bricks capable of delivering 220W across multiple ports. Prices range from around $24.99 for the Cuktech CP12 (10K/20W) to $129.99 for the most powerful unit we’re testing, the high-end Anker Prime (A110B) 20K/220W. Some include integrated USB-C cables; some include a removable USB-C cable; and some include nothing else in the box.

Others have fancy displays that show charging and temperature information, while some use simple LEDs that flash or change color to show charging status. Looks and size matter, too. The designs of the banks we tested range from simple grey boxes barely thicker than a deck of playing cards to larger stand-up units, and even see-through chassis.

What’s right for you depends on your needs, budget, and to some degree taste. In general, the higher the output and capacity, the more the device costs. How many ports do you want or need? Do you need to fly with it? Capacity and output are, of course, key deciding factors. But price, size, and safety features also matter. So there’s a lot to consider if you want the best power bank for you, and there are plenty of feature, design, and performance differences between our tested devices that we’ll share below to help with your buying decision.

What makes a power bank good or bad?

What makes a power bank good or bad?

The answer depends on who's buying the device and how they plan to use it. For example, if you need more than one charging port or an integrated cable, certain models just won’t work for you. Make sure it supports modern charging standards like USB-PD (Power Delivery) and/or Qualcomm Quick Charge so it can fast-charge your device (all tested devices below have PD3.0 or above).

Having the proper output to fast-charge your device is another important consideration. Buying a 10K, 25W charger for your Asus Zenbook Duo, for example, isn’t the best idea, since the device can use around 90W (@ 20V) to fast-charge and run. For that, you’d want something with more listed capacity and more wattage output. If you’re only buying a bank for your phone, that same 10K/25W charger can easily give your phone or a small tablet lots of extra run time away from a wall charger.

Rated capacity versus actual capacity is another issue, but marketing materials don’t clearly state it. The main thing to know is that the rating you see on the box is based on the battery's 3.7V rating. So the actual capacity varies depending on the voltage your device needs. The higher the voltage and output used for charging, the lower the actual capacity is. With 20V laptop charging, usable capacity can drop to around 20% of listed capacity, whereas with simple 5V charging it’s closer to 60% or more.

Another worthwhile feature for power banks is pass-through charging, or the ability to charge the bank and output power to your device(s) at the same time. Most do support this feature, though we couldn’t find anything concrete on the Cuktech CP12 or Baseus PicoGo Air (though every current Baseus PicoGo series does support it). Belkin’s Ultracharge limits output to 15W while charging, however.

Name-brand devices from Anker, Sharge, Cuktech, Belkin, and Baseus, like the ones we’re covering here, typically have multiple safety features, including protection against overcharging, over-current/voltage, over-temperature, and more, to prevent premature device failure (or worse). You’ll get an assortment of these features from popular brands, but be careful with off-brand ones, as they may not support some (or any) of them, and could therefore be a hazard. If you see a no-name power bank, make sure it is at least UL/CE (or CCC if in China) certified and has some or all of these safety features before buying.

Test Equipment and Setup

Test Equipment and Setup

To gather our power bank testing data, we need several items to ensure we’re getting the right information. Our test setup includes a wall charger to charge the empty power bank, an Asus Zenbook Duo and an Anker portable power station to charge and get output from, a USB tester that shows the output voltage, amperage, and watts, along with the charging protocol, mAh, and Wh, and an IR thermometer to record the device's surface temperature. We also need a high-quality cable that won’t limit the output (we chose one rated at 240W). To test the cable, we used a USB Cable Checker2 to verify its capability. Below is a list of all the parts we use in power bank testing.

• USB Tester/Voltmeter/Ammeter Tester - Chargelab Power-Z KM003C ($109.99)
• USB Tester (used with multiple connections) - HDC-085C ($12.15)
• USB Cable Checker - Bit Trade One Cable Checker2 ($60.00)
• Laptop - Asus Zenbook Duo ($2,299.99)
• Charger - Satechi Chargeview 240W ($149.99)
• IR Thermometer - TempPro TP30 ($20.99)
• Wall Power Monitor - Tekcoplus TK282PLUS_US ($20.99)
• USB-C Cable (240W) - Anker 515 ($21.99)

How We Test

How We Test

Before we plug the device in, we inspect build quality (does it feel like cheap plastic or metal), size, weight, and port count/type. We also look at capacity and output ratings, fast-charging capabilities (think PD, etc.), and any certifications (UL/CE) or safety features. From this information, we can get a good idea of the pros and cons, including cost/mAh, actual versus listed capacity, port count, temperature, protections, and more.

For testing, we first make sure the power banks are fully discharged before we begin. Next, we take the chassis temperature with the IR thermometer and connect the power bank to the Satechi desktop charger via a certified 240W USB-C cable, along with the Power-Z device. From there, we record the time to fully charge the device and the maximum sustained input wattage (which, as you’ll see, tends to drop due to temperature or at a point in charging where it slowly lowers the amperage/wattage, and sometimes voltage). We also record the maximum chassis temperature using the IR Thermometer.

After fully charging a power bank, the next step is to discharge it using a constant load. In this case, we use the Asus Zenbook Duo as a real-world load up to ~93 W while running Cinebench for the CPU and FurMark to stress the integrated Intel Arc B390 graphics. This isn’t your basic budget laptop. At over $2,200, it packs an Intel Core Ultra X9 388H (5.1 GHz turbo, up to 80W), dual 14-inch Lumina Pro OLED touchscreens, and a 99 Wh charger.

Here, we test maximum and minimum output in watts and determine watt-hours (Wh) and milliamp-hours (mAh), with data gathered from the Power-Z device while discharging. We also record temperature readings at the start and at the maximum.

Once we have that data, we can determine the device's capacity efficiency, at least for testing the laptop and higher-voltage charges. As we mentioned earlier, mAh ratings on packages are inflated by voltage-conversion losses and are based on the internal battery cells' 3.7V voltage. The higher the voltage (and, of course, amperage/watts), the less mAh capacity a battery bank provides.

In our testing, the Zenbook Duo accepts 20V and up to 93W when it can, which is a worst-case scenario for smaller-output chargers, normal for higher-output chargers, and typical for laptops and higher-powered devices. If you’re only charging a smartphone or small tablet at lower volts, the value will be closer to the listed specifications. But it will differ when your smartphone charges at a lower voltage, often 9V for fast charging. Remember, output wattage (and voltage) determines charging speed, and for some people (or in some instances), that matters more than capacity.

After testing all of the power banks, we compiled all the data into the charts below.

Tested Power Banks

Tested Power Banks

We captured some images of all the chargers during the test below. We also included a simple chart listing all the power banks tested, along with capacity, wattage, port/count type, safety features, and the current price (at the time of publication).

Takeaways and Results

Takeaways and Results

What surprised me most was how long a couple of these devices took to completely charge from empty. Cuktech’s CP12 and CP24 models and the Baseus PicoGo AC22 took over 2.5, 4, and 6 hours, respectively, to reach 100%. This is partly due to lower input wattage and/or how the device accepts power over time. Whether it's the voltage used, temperatures and potential throttling, or battery health and safety features, each handles the activity a bit differently. Others, like the Anker Prime or Shargegeek 170, offer much higher output and charge even higher-capacity devices much faster. In fact, the Shargegeek took under an hour to fill its 24K mAh coffers, accepting the most power (almost 140W peak) from our charger. Again, charging may not be a major concern for many people, but it’s good to know how long to expect your bank to reach full, since some are notably faster than others at the same capacity.

Temperatures didn’t play as obvious a role as they did in our charger testing. Lithium batteries perform best between 20 and 30 degrees Celsius, and the hottest device we covered was the Baseus PicoGo, which reached a peak chassis temperature of 43 degrees. The coolest of the bunch were the Anker Prime and Anker Laptop chargers, peaking at 37 degrees externally. These are all warm to the touch, but not hot — not something I would be particularly concerned about leaving out on a desk or table, in your purse or backpack, or even just sitting on the couch or a bed while charging your device(s).

But of course, it’s always good to keep charging devices somewhere you can see them regularly. Because batteries can, of course, be dangerous when things go very wrong, and there are at least two batteries cycling when you’re using a power bank.

Discharging didn’t bring too many surprises. A rare couple, like the Shargegeek 170 and Cuktech P23, maintained output throughout the entire discharge tests, while most others dropped voltage, amperage/wattage, or both. This matches how many devices charge: they use a lot of power/voltage initially, then drop to lower values to protect battery health (or due to thermal throttling).

We see a lot of ads about charging X device to Y% in Z minutes, and the higher the sustained output (assuming your device can take it), the faster it charges. For those that did drop, the differences were somewhere between 33% and 50% of the peak output.

The one thing I found surprising here was how quickly some power banks stopped outputting at their maximum. For instance, the Baseus PicoGo dropped from its peak just four minutes into testing, while the Shargegeek 170 pumped a constant 90+ Watts until it was empty – no subtle voltage changes, just 20V/90W full tilt until the very end. Belkin’s Ultracharge also maintained its full output over time.

Below are the results covering capacity, output, and the actual capacity from our testing. The Anker Nano (A1638) had the least capacity when charging a laptop, at 1,600 mAh out of 10K. It spit out over 40W of output for a short time and stepped down to 20W, about 20 minutes in.

The Baseus Picogo Air and its slim design managed the highest actual capacity, but this is more a function of its limited 9V output and a quick drop from 19 to 11W. This tiny little device is great for a phone, but not ideal for larger items like our laptop. The large 24K Shargeek 170 sits in the middle of the pack, since it can output the full 20V and 90+W constantly.

Conclusion

Conclusion

After testing all 13 power banks, there really isn’t a single ‘best’ bank. It comes down to what you’re charging and how patient you are. If you’re mainly topping off a phone or small tablet, capacity efficiency matters more than raw output. The Baseus PicoGo Air (currently $49.99 on sale), with its tiny footprint, shines here, squeezing out the highest actual-versus-listed capacity because of its lower 9V charging output. It’s small, light, and fits easily into a bag or purse; just don’t expect it to do much for a laptop, but it will easily charge a modern smartphone.

For laptop charging, the Shargeek 170 (currently on sale for $79.90) and Cuktech P23 $109.99 stood out by maintaining peak output (90+W @ 20V) through discharge instead of stepping down like most other power banks. At under $80, the Shargeek is a steal compared to the Cuktech.

Although others will charge laptops fine, that consistency could mean the difference between a predictable fast charge and a slower charge over time due to pre-programmed behavior or thermal throttling. The Anker Prime at $129.99 deserves a mention for charging laptops, too, as it pairs high output, fast charging, and the coolest chassis temps. However, it is the most expensive power bank we’ve tested. While it and others do come with informative displays, it’s up to you if that’s worth the premium.

If you’re concerned about the speed of charging the power bank, stay away from the Baseus PicoGo (AC22), Cuktech CP24, and CP12 – they took anywhere from 2.5 to 6 hours to reach full, which is a long time to wait if you need your battery back in rotation quickly. The good news is that these also have pass-through charging and will charge and discharge at the same time. The bottom line is, for phones, go small and efficient like the Baseus PicoGo Air; for laptops, prioritize sustained high wattage and sheer capacity (Shargeek 170, Cuktech P23, or Anker Prime), and if you want a bit of everything, the Anker Prime is hard to beat given its balance of speed, output, and temps, but it is expensive.

In late August, Architect Labs claimed it had designed a chip that was almost entirely developed by AI, an industry-first achievement. AI is already used to optimize floorplans, placement and routing, verification, and other stages of semiconductor development. Generative AI can assist engineers with RTL code, whereas emerging agentic systems can operate electronic design automation (EDA) tools, analyze results, identify problems, modify designs, and repeat the process with increasingly less human intervention. Meanwhile, human engineers still define and develop architectures and make fundamental design decisions that determine what a chip does and how it works.

This creates a curious feedback loop. Today's AI models run on processors designed by human engineers with growing assistance from AI; those models can then help design more capable processors for the next generation of AI systems. As EDA vendors and semiconductor companies give AI control over progressively larger portions of the design process, the industry is gradually moving from humans using AI tools to design chips toward AI systems participating in the design of the hardware on which their successors will run.

Can machines indeed design machines today? Probably not. But will they be able to do so in the future? That's a big question with important ramifications — and engineers have been pondering it for longer than you might think.

A brief history of AI in chip development

Cadence, Synopsys, and Siemens EDA, all leading developers of EDA software, alongside Ansys — a leading designer of simulation software — rolled out AI-enhanced versions of their tools in the early 2020s, before the generative AI boom took the world by storm.

The first generation of AI-enhanced EDA software primarily used machine learning (ML) and reinforcement learning (RL) to tackle well-defined optimization problems. Given an existing design, a set of constraints, and particular targets, these tools could explore numerous implementation options to optimize placement and routing, and therefore power, performance, and area (PPA), while shrinking development time. Essentially, AI could find a better way to implement a design, but the design itself and its goals were still defined by engineers.

One of the key advantages of these tools was their ability to learn from previous runs and use accumulated data to guide subsequent design-space exploration, something which could reduce the number of iterations needed to meet PPA targets and, in some cases, produce results that would have required considerably more engineering time using conventional methods. Yet the autonomy of these tools is limited, as engineers define constraints, configure flows, run individual tools, analyze their output, and decide what to try next. AI accelerates or optimizes particular stages of chip development, but humans still control the overall design flow. And that's changing with newer generations.

The latest AI-enhanced EDA tools are considerably more ambitious. Generative AI can write or modify RTL and verification code, analyze reports, identify potential points of failure, and even suggest fixes. Meanwhile, emerging agentic systems can operate multiple EDA tools and execute sequences of engineering tasks with very limited human intervention. Such an agent can analyze results, modify a design or its parameters, launch another simulation or implementation run, evaluate the outcome, and repeat the process until it reaches specified targets. As a result, AI is gradually moving from optimizing individual steps inside EDA tools to automating parts of the chip development workflow itself.

From big bang to architectures

In 2023 – 2024, both Cadence and Synopsys announced that hundreds of chip designs have been completed using their AI-enhanced Cadence.ai DSO.ai/VSO.ai/TSO.ai tools. Moreover, leading high-tech companies revealed details about how they used AI to complete their projects. Yet putting Google, Nvidia, OpenAI, and Architect Labs into the same bucket is not right, as they represent different degrees of AI involvement in chip development.

Google, which was among the first high-tech giants to announce the use of AI to develop its AI accelerators, seems to be the least radical. Google's AlphaChip uses reinforcement learning mostly for physical floorplanning: it places circuit blocks and optimizes layouts, but it does not invent the entire design or the architecture itself. Google DeepMind said in 2024 that AlphaChip had been used for the previous three generations of TPUs, meaning Google was well ahead of the general EDA industry with its tools. (The company has not shared AlphaChip's progress in detail since then.)

Nvidia is more interesting because its internal AI systems tend to automate work traditionally performed by hardware engineers. The important distinction is that Nvidia trains specialized models on its own RTL, documentation, and unique accumulated engineering knowledge, something a merchant EDA vendor cannot access. This makes Nvidia an example of a chip designer that turns the engineering data behind its proprietary GPU and, more recently, AI accelerator, CPU, DPU, and network cards into training data for AI. Nonetheless, Nvidia itself draws a clear line between its automation and autonomous chip design.

OpenAI's Jalapeño is probably the strongest real-silicon example we currently have. OpenAI says AI was directly involved in implementation, design-space exploration, verification loops, and arithmetic-circuit optimization, which enabled the company to go from initial design to tapeout in nine months. At Hot Chips, OpenAI disclosed some concrete PPA advantages: Compared with human baselines, AI-assisted designs improved a BF16 multiplier by 56%, an FP4 dot-product block by 21%, and an FP32 accumulator by 10%, while reducing the area of matrix and SIMD units by 10% and 8%, respectively.

OpenAI has not said that AI invented Jalapeño's architecture, so humans have indeed remained responsible for it. But AI was extensively used to turn that architecture into silicon and optimize it ... which brings us to Architect Labs.

Indeed, Architect Labs' Redwood is qualitatively different. Two human architects defined the specification, after which Architect Labs says its AI autonomously generated and verified the logic, generated RTL, verified it, and produced firmware. To top it off, AI also assisted software development, including drivers and kernels. Meanwhile, unlike Google, Nvidia, and OpenAI, the company explicitly describes its system as one that performs machine learning co-design and says it can explore architectures, though without elaboration.

Redwood was 'produced' in under two weeks and runs billion-plus-parameter models, but there is a huge caveat: It has not been taped out. It has never actually been produced as an ASIC; the accelerator runs on an FPGA, and the claimed 3.4X performance-per-watt advantage over Nvidia's Jetson Orin Nano is based on a projected Samsung 8LPP design.

Final words

Just a few years ago, AI in semiconductor development was largely an optimization technology that helped engineers find better ways to implement designs created by humans. Today, it can generate RTL, verify designs, operate EDA tools, and even explore architectural choices, although humans still define what ultimately gets built.

We are therefore considerably closer to machines designing machines, but nowhere near the singularity quite yet. For now, chips are helping design their successors. But they aren't even close to deciding what those successors should be.

In a world where anything related to a PC seems to have risen 1000% in price, it's good to see that some things are still available at a discount. This keyboard will make enthusiasts wince at the use of membrane switches, but it's the perfect choice for the price and possible use case,, especially if the person you're buying it for has a habit of spilling drinks over their peripherals. With a hefty 40% discount off the original $49.99 list price, the SteelSeries Apex 3 is now priced at just $29.99, a solid price for a full-sized gaming keyboard from a reputable peripheral manufacturer.

● Check out this deal at Woot

The SteelSeries Apex 3 has an IP32 certification and is a water- and dust-resistant keyboard, which gives it an extra level of protection against the pitfalls of eating or drinking near your peripheral. The Apex 3 is a full-sized keyboard with a number pad on the right-hand side, a full function-key row, and multimedia controls.

Its keys aren't mechanical; they are membrane switches, so they are much quieter than clacky mechanical switches, but are still rated for up to 20 million keypresses. The keyboard looks very similar to its more expensive and feature-rich lineup, including the incorporation of a magnetically attached wrist rest that can be easily removed and reattached when needed.

This version of the SteelSeries Apex 3 does not feature per-key lighting, but instead has a 10-Zone RGB LED setup. These RGB zones can be programmed with custom colors or effects and saved to individual profiles. The brightness of the backlight LEDs can also be adjusted.

The SteelSeries Apex 3 is also capable of saving your custom macro combinations to individual profiles and has a dedicated key to swap between these profiles on the fly. There is also dedicated multimedia controls with a button and roller combination controlling the volume and play/pause/skip functionality.

At only $29.99, this is a great price for a gaming keyboard gift for kids who might be inclined to spill food or drink while at the PC, or for a cheap replacement keyboard in general if you're not adamant about having mechanical switches or the latest magnetic switch features.

The USB Implementers Forum now lists some of Intel's Core Ultra 400-series 'Nova Lake' platforms in its Integrators List, meaning that the products have passed applicable USB compliance and interoperability tests. The PCI-SIG Integrators List also includes Intel’s 900-series chipsets for Nova Lake-S processors. Such tests are conducted ahead of product launches to ensure interoperability and to gain the right to use the PCIe and USB logos on new products.

The USB-IF listing confirms that Intel's mobile Nova Lake-H processor (Device ID D331, D333) is compliant with the USB4 80 Gbps specification (which is not surprising, as the part is also supposed to support Thunderbolt 5). In contrast, Intel's desktop Nova Lake PCH-S chipset (Device ID 6E6E) is compliant with the USB 3.2 Gen2 standard and supports a data transfer rate of up to 20 Gbps, which is in line with unofficial information about Intel's 900-series chipsets. Meanwhile, the Integrators List lacks Intel's desktop Nova Lake processor that is expected to support USB4 (more on this later).

The choice of the products to certify first — a desktop chipset and a high-performance notebook CPU — may seem a bit odd. However, there is a good explanation for why Intel submitted these parts to the Integrators List ahead of others and why the order of such submissions for compliance testing does not matter significantly in this case.

The USB-IF has a program called Qualification by Similarity (QbS) for sufficiently similar products, under which testing one product can enable related products to be certified and added to the Integrators List with limited or no additional compliance testing. Since USB4 and USB 3.2 circuitry in different Nova Lake products is similar, Intel can submit select CPUs and chipsets for USB-IF compliance tests and then follow up with the QbS.

Meanwhile, since USB-IF certification is formally attached to a specific product name, model, and revision, differently named products are not certified automatically simply because they contain identical USB circuitry. These products must be submitted separately under QbS, after which USB-IF decides whether the differences are significant enough to require additional testing.

The PCI-SIG Integrators List has included Intel's 900-series chipset (Device 6E38-6E3F, 6E30-6E35, 6E40-6E47) for Core Ultra 400-series 'Nova Lake-S' processors since April. In early August, the company’s as-yet-unidentified processor (Device IDs D461, D465, and D467–D46A) with a PCIe 5.0 x16 root complex passed interoperability tests and was listed alongside the chipset. We cannot state with certainty that this is a desktop Nova Lake CPU, although it is reasonable to suspect that the device belongs to the desktop Core Ultra 400-series platform.

As the official launch of Intel’s Core Ultra 400-series ‘Nova Lake’ processors for desktops and laptops looms, these platforms must pass various compliance and interoperability tests administered by industry standards organizations. So far, Intel’s Nova Lake CPUs and supporting chipsets have passed interoperability tests with the PCI-SIG and USB-IF. However, in the coming weeks or months, they will likely appear on other compliance and interoperability lists as well. Intel will also eventually need various regulatory and environmental documents, depending on what exactly is being sold and where, though such documents rarely enter the public domain ahead of formal launches.

Anyway, Nova Lake's listings in PCI-SIG and USB-IF Integrators List point to Intel's preparations for the launch of new CPUs for desktops and laptops. The latest leaks point to Core Ultra 400-series launches in Q1 2027, so setting the stage for their release early next year is a natural move for Intel.

In the face of strong demand and device shortages, Sony has decided to filter PlayStation 5 Pro purchasers in Japan using a lottery system. We’ve seen such anti-scalper techniques used by the makers of the most treasured tech before, but the Sony Store in Japan is also insisting (machine translation) that those joining the queue for PS5 Pro purchase tickets possess a Japanese PSN account. Furthermore, participants must have logged at least 60 hours of gaming time on a PS4 or PS5 over the last two years.

The Sony Store’s PS5 Pro application and purchase conditions indicate that PS5 Pro purchase lottery ticket applications are limited to gamers who can satisfy the following:

• “For those using PlayStation Online Services with a Sony account registered in Japan.”
• “You must be signed in to your Sony account and have played a total of 60 hours or more of games on either a PS5 or PS4, or both, between September 27, 2024 (Friday) and September 27, 2026 (Sunday) at 23:59.”

These Sony Store PS5 Pro purchase applications will open on October 7, with sales to ticket holders commencing October 26, 2026. If the applications to purchase Sony’s MSRP stock outstrip supply, then prospective purchasers will be selected via lottery. Successful applicants will have until November 2 to complete the purchase of their PS5 Pro at MSRP.

The PS5 Pro has been available to buy for approaching two years (launched November 2024). These game consoles have also seen prices climb several times this year due to key components being funneled to AI data centers. You might think that the console aging and getting more expensive would slow demand. It is thought, however, that demand for the PS5/Pro consoles is now rising, at least partly due to the impending release of Rockstar’s GTA 6.

Japanese gamers have previously been seen to grumble about foreign tourists buying up stocks of RTX 5090s, for example. That experience makes the PS5 Pro lottery system, tied to the Japanese PSN account requirement, seem logical. Moreover, the logged PlayStation gaming time of 60 hours helps steer stock to folks who buy these machines to enjoy, rather than just scalp and sell them on.

After unveiling the EPYC 9006 (codenamed Venice) series in July and previewing a few impressive Zen 6 benchmarks, AMD has now released full pricing for its highly anticipated next-generation server chips. According to the list StorageReview obtained, AMD has big plans for the data center, with a wide range of SKUs from eight to 256 cores and pricing from $700 to $14,904.

As a quick refresher, AMD strategically divided the Venice lineup into two distinct segments. The SP7 platform is the flagship offering, delivering maximum memory capacity and throughput. It supports up to 16 memory channels, accommodating both RDIMMs and MDRDIMMs up to DDR5-12800. The platform offers up to 96 PCIe 6.0 lanes and supports Venice chips with TDPs between 400W and 600W.

The Venice parts designed for the SP7 socket offer scalable performance for enterprises. The lineup begins with the 64-core EPYC 9556, priced at $8,008, and extends to the flagship 256-core EPYC 9996, which commands $14,904. In retrospect, the EPYC 9996's price tag does not seem particularly shocking, especially since the previous-generation EPYC 9965 (codenamed Turin) launched at nearly the same price, around $14,800.

As is typical for server processors, the total price increases as the number of cores rises. However, the price per core actually decreases substantially as you move up the core ladder. The pricing dynamic is very notable with Venice. For example, the flagship EPYC 9996, with a massive 256 cores, comes out to just $58.21 per core, whereas the "entry-level" SP7 chip, the 64-core EPYC 9556, costs around $125.12 per core. As a result, higher core-count models are more attractive from a per-core value perspective for data centers, cloud service providers, and enterprises.

AMD EPYC 9006 SP7 Specifications and Pricing

The SP7 SKUs support both 1P and 2P socket configurations. The latter, in particular, enables up to 512 Zen 6 cores in one system by pairing two EPYC 9996 chips on a single motherboard. That level of performance logically comes with a substantial investment, since the processors alone would cost $29,808 before factoring in the significant expense of memory today.

Among the nine SP7 SKUs, two models in particular stand out: the EPYC 9686F and EPYC 9586F. The "F" suffix means these chips feature maximum boost clock speeds, in this case, 5 GHz. While both are impressive in their own right, AMD optimized these parts to hit 5 GHz. Naturally, this level of optimization carries a price premium. For example, the 64-core EPYC 9586F costs almost as much as the 96-core EPYC 9656, despite offering 33% fewer cores. The trade-off is also apparent in the thermal envelope. The EPYC 9586F has a TDP that is 100W higher than the EPYC 9656.

AMD EPYC 9006 SP8 Specifications and Pricing

The SP8 platform is a more streamlined and cost-effective counterpart to the SP7 platform for the Venice family. It supports eight-channel memory and does not embrace MRDIMMs. However, the limitation balances out by expansion possibilities, as the SP8 platform offers 128 PCIe 6.0 lanes, 33% more than the SP7 platform. Additionally, the SP8 platform has a lower thermal footprint, as these Zen 6 parts carry TDP ratings between 130W and 400W.

The SP8 platform offers an accessible entry point for organizations, with the octa-core EPYC 9106 priced at just $700. At the other end of the spectrum, the EPYC 9746, which is the top SP8 SKU, offers 128 Zen 6 cores at $11,679.

With the SP8 platform, we also see Zen 6 models with the “P” suffix, which indicates support for single-socket systems only. These variants deliver the same performance as their standard counterparts but at a significantly lower price. For example, the 128-core EPYC 9736P is 6% less expensive than the EPYC 9736. In an even more dramatic case, the 32-core EPYC 9356P retails for 26% less than the EPYC 9356.

One of the more unusual Venice chips is the 16-core EPYC 9176F. Despite its modest core count, it features a massive 192MB of L3 cache, 4X that of the 16-core EPYC 9116, while costing more than 3X as much. This translates to 12MB of L3 cache per core. With its high cache capacity and 5 GHz boost clock, AMD likely designed the EPYC 9176F for organizations seeking to minimize licensing costs for software priced per core.

AMD’s SP7 and SP8 platforms are scheduled to launch in the fourth quarter of this year and the first half of 2027, respectively. However, these Venice prices are not final, as AMD has stated that the list is subject to change. AMD will extend the lineup further later in 2027 with Venice-X chips, which use the company's 3D V-Cache stacking.

There's a brilliantly priced, 4K-capable gaming PC on sale right now at Newegg. The tech retailer has dropped the price on this CyberPowerPC rig to $1,999.99, giving you specs that include the AMD Ryzen 7 7800X3D and Nvidia GeForce RTX 5070, along with 32GB of DDR5 RAM and a 1TB SSD.

● Check out this deal at Newegg

This is a powerful rig for gaming, with the AMD Ryzen 7 7800X3D processor at its core. The 7800X3D isn't quite at the top of the CPU food chain these days, but AMD's 3D V-cache chips continue to massively outperform the competition. The 7800X3D itself ships with eight cores, and all eight are able to use the boosted 96MB of L3 cache capacity.

This means the CPU doesn't have to drop down to the slower system RAM while you game, giving you even better performance. Along with those eight cores, you also get a 4.2 GHz clock speed, which can boost up to 5 GHz.

The CPU benchmark data below confirms that the 7800X3D is still one of the best options for a gaming rig in 2026. These AMD X3D chips are first-rate, with that L3 cache boost giving you the edge. It's rare to find X3D chips in a gaming PC under $2,000 these days, with the RAMpocalypse continuing to push prices up across the board. There's no need to worry about any poor CPU performance here.

A formidable combination with the 7800X3D is the Nvidia GeForce RTX 5070. As our RTX 5070 review shows, this is a GPU that delivers on performance, although the price for the GPU itself continues to be a problem. In this rig, though, you're getting a good, mid-tier performer that continues to make our best GPU list as the best all-rounder Nvidia GPU for gamers from this current generation.

The RTX 5070 ships with specs that include 6,144 CUDA cores and 12GB of GDDR7 VRAM operating on a 192-bit memory bus. Gamers can expect performance that hits the highest frame rates at 1080p, even using high and ultra presets. 1440p is a match here, too, although the most demanding games might require a graphics tweak from time to time.

As for 4K, that's possible here, but you will probably need to take full advantage of Nvidia DLSS to get the best frame rates, including multi-frame generation. AI frames are controversial, but they will ensure you can pass the 4K resolution barrier with playable frame rates without paying the thousands extra for an RTX 5090. Along with the GPU and CPU, you're getting a 1TB NVMe M.2 SSD and 32GB of DDR5 RAM. There are no compromises here for price, which is nice to see.

Specs like this are rare to find in a PC for under $2,000, but this $1,999.99 CyberPowerPC gaming PC is a rare find in a market that is only pointing upwards in price. If you fancy a 4K-capable gaming PC that'll last you for the next few years, pick up this PC while you can.

Intel has published a patent to integrate MicroLEDs directly into a CPU package. Aside from communication functions, Intel lists many possible uses, including using multi-colored lights to light up the wording on a processor. The patent, filed in 2022 but only published earlier this month, describes embedding a MicroLED into the package by using a glass substrate and through-glass vias (TGV), connecting directly to a die for power and signal routing. The patent says the purpose of the LEDs is "either aesthetic components of the electronic device or to indicate certain operations being performed by the electronic device."

As is the case with any patents, the purpose of embedding MicroLEDs into a chip is left open-ended. However, Intel interestingly calls out implementing MicroLEDs into a CPU, specifically, and provides several examples of how the tech might be used. The patent says the processor "may operate the micro LEDs so that the micro LEDs visually indicate that certain functions are being performed by the processor or simply for aesthetic effects."

In one part of the patent, Intel describes the LEDs being used to "light up wording across a central processing unit," suggesting some sort of read-out available directly on the CPU. How that would work on a standard processor with a heatsink atop remains an open question. In addition, the patent explicitly calls out that the LEDs can be different colors depending on the implementation. That could mean something more akin to RGB memory than a diagnostic readout. The patent leaves room for both designs.

You can see the main drawing for the patent above. In the middle is the glass substrate, sandwiched between two layers of package substrate. A semiconductor die is partially embedded within the glass substrate, leaving just the back surface of the die exposed; however, the patent says the die can be fully embedded in other implementations. The LEDs are connected directly to the semiconductor die, or through nanowires, and TGVs deliver power and signal to the semiconductor die through the glass substrate.

Intel says it builds the package with two layers of silicon nitride, which are formed on the package substrate surface and then attached to the glass substrate. Intel has been working through glass substrates for over three years now, as Intel claims it has 10 times better interconnect density than organic substrates.

The main patent drawing only shows a single IC, though the patent notes that's simply shown "for clarity." A finished product implementing this technology "will have an array or arrays of micro LEDs on one or more IC packages." So, given an ambitious-enough design, Intel could implement multiple LED-based functions directly into the processor.

Patents aren't products, and that's always an important reminder. Intel filed this patent over four years ago, and it's just now being published. Whether we actually see MicroLEDs embedded in a processor remains an open question. However, Intel has laid the groundwork to do something like that in the future.

Intel has been granted a U.S. patent that discusses embedding MicroLEDs inside chip packaging, as TrendForce reports. The design embeds semiconductor dies fitted with MicroLEDs directly into a glass substrate and connects them using Through-Glass-Vias (TGV) to provide power and signal connections, allowing them to emit red, green, and blue (RGB) light. Intel suggests this technology could be used for diagnostic testing and to create customized light effects on the chip's surface for personalized electronics and improved aesthetic appeal.

The potential for this to support optical signaling is intriguing, and likely holds significant commercial potential for Intel. Taiwanese optoelectronics firm AU Optronics has a technology roadmap that overlaps with Intel's patent, with some rumored collaboration between the pair, suggesting the two companies may be jointly developing companion technologies in this space.

AUO recently showcased Micro LED optical communication at SEMICON Taiwan 2026, with a design goal interconnect range of up to 10 meters, targeting use in AI data centers. Embedding Micro LEDs into a glass substrate could offer an alternative integration approach for co-packaged optics to Intel's previous demonstration of a co-packaged optical I/O chiplet.

How Intel wants to build chips with glass

In the patent, Intel describes using laser treatment and etching to create the through-holes and die cavities within the glass substrate. It would then use copper electroplating to form the TGVs before embedding the dies carrying MicroLEDs into the substrate. Silicon nitride layers join the glass to polymer package substrates on either side, while conductive vias carry signals and power.

The patent also describes the potential for differing structural variations, including alternative arrangements for horizontal or vertical die placement, and the integration of reflectors to direct light out of the package through the glass substrate.

Intel has been investing in glass substrate technology since the early 2010s and has showcased test packages using glass substrate materials. In January this year, at NEPCON Japan, it demonstrated an engineering sample of a glass core package combined with its EMIB multi-chip module technology.

At ECTC in May, Intel also showcased a 24-layer glass-core panel with copper-filled TGVs, with two embedded EMIB bridges. Arguably more importantly for its chip design and fabrication business, it presented results demonstrating progress towards high-volume manufacturing validation for its glass core substrate designs.

Potential for diagnostics and aesthetics

MicroLEDs built into the chip packaging itself hold potential for diagnostic and testing purposes. They could be used to provide visual indicators of completed tests or failures, without requiring external LEDs or other indicators on motherboards or connected components. Intel's patent doesn't describe a complex diagnostic system, but with pre-determined lighting patterns assigned specific meaning, die-embedded MicroLEDs could provide more streamlined feedback during validation and testing phases.

The patent also discusses the potential for aesthetic use cases of in-package LED lighting. DIY electronics could use it for personalization, including illuminated lettering on the chip's surface. Such designs would need to take cooling into consideration, though. Dies that draw enough power to demand external cooling may not be able to avoid obscuring the MicroLEDs on the package surface.

That could limit this use of the technology to low-power chips, or simply demand a specific heatsink configuration, leaving portions of the packaging bare to ensure the MicroLED light is still visible.

A potentially more significant application of this technology, however, is in an alternative optical interconnect system. The patent doesn't establish a high-speed working optical interconnect, but with AUO's parallel developments in Micro LED CPO modules, the potential is certainly there.

The implications for CPO

MicroLEDs also have potential for optical signaling. AUO's showcase earlier this month highlights this. Combining MicroLED transmitters and Micro photodetector receivers, AUO is developing a system-level MicroLED CPO module designed for high-speed interconnect applications.

Intel's patent could lay the groundwork for something similar. It hasn't proposed that application, nor does the patent make such claims, but embedding MicroLEDs in-package could provide a starting point for integrating optical transmitters.

Embedding emitters is only part of the communication system, though. Where AUO and its partners have showcased MicroLED optical interconnection as a real development direction for CPO, Intel's patent only describes a packaging technique that could support such a system. Like AUO, it would need the receivers and optical fiber solutions to develop a full optical interconnect module.

Intel is clearly investing heavily in glass substrate technologies and has been developing advanced interconnects for years. If it were to partner with AUO on its existing developments, it could accelerate its own efforts in this space and provide an alternative method for bringing interconnects within chip packages.

But that's still very much up in the air. Until Intel makes a more concrete announcement, this is more potential than actual.

Former Nvidia advisor Eric Gullichsen says that he is “owed a billion dollars in NVDA stock,” according to his blog post titled the same. The post says that Gullichsen, an early Nvidia Technical Advisory Board member, was granted 25,000 options in September 1993.

Re-reading the grant in 2024, he says, showed that it was meant to vest in four quarters, or a year, instead of over four years. An April 1996 CFO letter counted 15,625 vested, so 9,375 more shares should have vested too, he added. After a combined 480x in splits, this would be 4.5 million shares, or about $1.01 billion at Nvidia’s Sept. 25 close of $225.07, in line with his “about a billion dollars.” He says that he and his counsel agreed that the statute of limitations was against him, and “it seemed unlikely we’d make it past a motion to dismiss.”

The option grant document provided by Gullichsen on the blog post is dated Sept. 9, 1993, with a No. 7 grant of 25,000 shares, signed for Nvidia by Huang. “All shares shall vest upon the expiration of one year from Grant Date,” which means fully vested by Sept. 9, 1994. It states 25% at three months, then quarterly, which would be four times in the year.

Gullichsen also provided the exercise letter from CFO Marcel Gani dated April 16, 1996, which ends his “contractual relationship with NVIDIA and Its Technical Board of Advisors” and states that he had “15,625 shares of NVIDIA stock options vested.” This was at $0.05 a share with 90 days to exercise, or $781.25 for a full exercise.

Gullichsen also included an undated invitation letter signed by Huang asserting “a stock option of 25,000 which vests over 4 years.” Doing the math, 15,625 is 62.5% of 25,000 shares, or 10 of 16 quarters, which matches the Sept. 9, 1993 to April 16, 1996 timeline. The CFO’s count fits the four-year quarterly schedule. So the CEO’s letter says four years, while the signed cover sheet says one. The cover sheet also says any discrepancy with its attached legal provisions “shall be governed by the attached legal provisions,” and those attachments are not in Gullichsen’s post. It also says it supersedes prior written agreements, which would override the invitation letter.

Upon discovery of the possible discrepancy, Gullichsen hired lawyers who worked “on contingency,” according to one of his replies on a related discussion thread. After about a year of letters between his team and Nvidia’s in-house and outside counsel, the two sides met. “We proposed to settle for a far smaller number,” he wrote, but Nvidia “still made the call to say nope.” He and his lawyers concluded that after “thirty-odd years” the case may be too far past its prime. The CFO letter’s exercise window had closed around July 15, 1996. Nvidia has not publicly responded.

Gullichsen worked on multiple VR projects starting in the late 1980s with his own company, Sense8, which he co-founded around 1990. That VR rendering work led to a fast implementation of biquadratic texture mapping, which he says caught the attention of Nvidia co-founder Curtis Priem in 1993, the same year of the option grant. Priem then brought Jensen Huang and fellow co-founder Chris Malachowsky to Gullichsen’s houseboat in Sausalito for a demo, he says.

He is a named inventor on a patent filed in 1994, “Wide-angle image dewarping method and apparatus” or US5796426A, which names “the NV-1 chip sold by N-Vidia Corporation” as a hardware example. The NV1 was not commercially successful but used quadratic surfaces as its basic primitive.

Some commenters inquired about what happened to his existing shares. Gullichsen had not answered as of Monday morning. His settlement reasoning, however, included “the likelihood I would have sold.” Our earlier reporting shows another investor, Stanley Druckenmiller, sold before the 10-to-1 split. Nvidia has since reached the position of the most valuable company in the world, at least temporarily. The stock’s rapid rise in value has created many new millionaires among its employees.

As for Gullichsen’s advice: “Read the contracts. Carefully.”

Nvidia CEO Jensen Huang and Anthropic CEO Dario Amodei had a rocky first meeting, according to an upcoming book. Kevin Roose, the author of the forthcoming book, The AGI Chronicles, published an excerpt on X that their initial rendezvous was filled with disagreements and included some slights.

The meeting, which the book says took place in May 2022 at the high-end Chinese restaurant Eight Tables in San Francisco, was to discuss Anthropic's compute needs.

Roose writes that ahead of the dinner, Anthropic's chief compute officer, Tom Brown, had attempted to haggle for a discount on GPUs, showing Huang a spreadsheet suggesting that Tensor Processing Units from Google were, "dollar-for-dollar, a better investment than Nvidia's chips." That's when things reportedly got nasty.

The book claims that Huang, angry at the comparison, called Brown a "bean counter," though an Nvidia spokesperson denied that to Roose.

The dinner afterward didn't go much better. Huang reportedly talked about building the biggest data center in the world, which Amodei repeatedly pressed Huang on with various questions. Huang "just kept repeating himself," the book alleges, citing a source who saw the dinner. That led Amodei to mutter that Huang was being "kind of Trump-like." While no deal was struck at the dinner, the companies did later come up with a partnership.

Today, Anthropic uses a mix of GPUs from Nvidia and AMD, Google's TPUs, and is working on co-designing its own custom inference chips. Amodei recently published an essay entitled "We Must Pace the Frontier" recommending slowing down the pace at which new AI models are improved and dined with the actual Donald Trump.

Huang has publicly disagreed with calls for pacing and regulation, and instead has said in interviews that companies should self-police. Huang also said that companies that release unsafe products should be shut down. Many rogue AI attacks, such as OpenAI's model attacking Hugging Face, were in training during these incidents.

The AGI Chronicles releases on Oct. 6.

GMKtec has launched the Evo-X5 Pro, its latest agentic AI mini-PC, featuring AMD's flagship Ryzen AI Max+ Pro 495 processor and 192GB of LPDDR5X-8533 memory. The model with a 2TB PCIe 4.0 SSD retails at $6,799, while the 4TB model will set consumers back $7,099.

The Evo-X5 Pro launches today to go head-to-head with rivals, such as Acemagic’s F9A and Minisforum’s MS-S1 Max-P495, which use similar recipes: AMD's Ryzen AI Max+ Pro 495. The processor is the most performant SKU from the Ryzen AI Max+ 400 (codenamed Gorgon Halo) family. Unlike the regular Ryzen AI 400 (codenamed Gorgon Point) series, which uses a hybrid Zen 5 and Zen 5c setup, Gorgon Halo keeps only the full-size Zen 5 cores and drops the space-efficient Zen 5c cores.

Armed with 16 Zen 5 cores and 32 threads, the Ryzen AI Max+ Pro 495 stands out as a powerhouse in the mobile segment. It boasts a 3.1 GHz base clock, 5.2 GHz boost clock, and 64MB of L3 cache. The 16-core, 55W chip is essentially the mobile version of the renowned Ryzen 9 9950X (though with a far lower power budget). With abundant processing power, it is easy to see why the Ryzen AI Max+ Pro 495 is the elected candidate for these agentic AI mini-PCs.

The Evo-X5 Pro supports three performance profiles for the Ryzen AI Max+ Pro 495. The silent and balanced modes keep the chip at 54W and 85W, respectively, while performance mode allows up to 120W sustained and 160W peak. The mini-PC features a vapor chamber cooling system to keep the hardware cool, along with one 80 x 80 x 15mm system fan and two other 80 x 80 x 30mm cooling fans.

GMKtec Evo-X5 Pro Specifications and Pricing

The Ryzen AI Max+ Pro 495 supports up to 192GB of LPDDR5x-8533 memory, pushing past the 128GB available on Nvidia's GB10 chip and AMD's previous Strix Halo chips. Eight 24GB chips are soldered to the motherboard in close proximity to the Ryzen AI Max+ Pro 495. Gorgon Halo pairs the 192GB of LPDDR5X-8533 memory with a 256-bit interface to maximize memory bandwidth for local AI. This configuration delivers up to about 273 GB/s of bandwidth. Meanwhile, the Evo-X5 Pro enables allocations of up to 160GB to serve as VRAM for large AI LLM models.

GMKtec sells the Evo-X5 Pro with a 2TB or 4TB PCIe 4.0 SSD. The price difference is $300. It is a shame the company doesn't offer a bare-bones version of the Evo-X5 Pro, since some enthusiasts could reuse their existing drives or buy a new SSD at a lower price. The mini-PC has three PCIe 4.0 M.2 slots for PCIe-based drives, so users can have up to 24TB of fast storage. However, only two M.2 slots run at x4, while the third is limited to x1.

Super early bird and early bird customers are eligible for 6% and 3% off, respectively. Consumers can get the 4TB and 2TB versions for as low as $6,699 and $6,399, respectively. To further incentivize early adopters, only the first 30 units of the Evo-X5 Pro are eligible for super early-bird pricing. GMKtec includes a complimentary three-month subscription to the Z.ai coding plan and a 1.5X return in GMKtec Points.

Existing owners of the Evo-X2 and Evo-X3 models are eligible for an exclusive $50 discount on the Evo-X5 Pro when they use the X5P39550 EDM code at checkout.

In addition to its early-bird and upgrade offers, GMKtec is trying to seduce buyers with bulk-purchase discounts for the Evo-X5 Pro. However, these "offers" sound like a joke. Buying two, three, or five units nets consumers $10, $20, and $40 in discounts, respectively. If you are spending $32,995 on hardware, you would expect more than a meaningless 0.12% discount, but apparently GMKtec does not see it that way.

When the U.S. government imposed sanctions on the International Criminal Court (ICC) in The Hague, Netherlands, it also meant that its chief prosecutor lost access to Microsoft services, including email. It was then that the Dutch government decided that it was time to make plans that would reduce its reliance on software and services that were made or based in the United States. The result of that decision was DAWO, or Digitaal Autonome Werkomgeving Overheid (Digital Autonomous Work Environment for Government in English). And work is underway to bring it to fruition.

As Tweakers reports, via It's FOSS, the program was aimed at refreshing the technologies used by the Dutch government in such a way that it would no longer be in a situation where it could lose access to critical systems at the whim of a foreign country. From operating systems to office software and cloud services, a new system had to be devised and rolled out.

That system is built around NixOS, with three service providers tasked with the job. While SSC-ICT, DICTU, and DUO-ICT were the three chosen, the whole thing is overseen by the Ministry of the Interior and Kingdom Relations.

From a technical point of view, the use of NixOS was a key one. Its use of the Nix package manager means that each package is installed in its own directory with immutable and signed contents. That alone means that the setup is incredibly easy to reproduce across multiple machines, something that is an obvious benefit when dealing with different facets of a government. It's been suggested that up to 90% of a configuration can be carried over from one deployment to another. And as a bonus, NixOS can also run on computers that Windows 11 would usually balk at.

While the switch from Microsoft software and services to brand-new alternatives is a long and complicated process, steps are very much being made in the right direction. Eight municipalities are running trial programs right now, with the first stable version of the platform expected to be ready by the end of 2027.

The Netherlands is far from the only European country to be concerned about the ability of the United States' government to cut off access to software and services. Germany has already jumped ship from Microsoft-based systems, while Denmark and France are also in the process of a similar rethinking of their tech stacks as the one carried out by the Dutch.

The announcement of Google's new Googlebook laptops raised questions: what happens to the Chromebooks that many, especially students, know well? Google says it will be phasing out ChromeOS updates in mid-2034. That date matches plans previously described in court records, but it is now official.

In a support document for Chrome IT administrators in the enterprise and education space, the company explained that "many of our newest Chromebook devices will be eligible to transition over to Googlebook OS," but it hasn't listed models or described how upgrades will take place.

Chromebooks have 10-year support lifecycles. If you have a Chromebook with a cycle that extends beyond 2034, Google is telling education and enterprise managers that "Google is committed to supporting your transition to Googlebook OS, with many devices offering direct migration paths."

Googlebooks will support the same 10-year update and security patch system as Chromebooks, though it starts from the launch of the CPU inside the system.

The document also reveals that management capabilities for Googlebooks will come in the back half of 2027, suggesting that it also may be a while until we see the first enterprise Googlebooks. Chrome Education and Enterprise upgrade licenses are different from Googlebooks. If IT admins update Chromebooks to Googlebook OS or buy new machines, they will be on new licenses. Google has not yet announced those terms.

Googlebook OS appears much more like Android than Chrome OS, though we're still waiting for time with a device. In the support document, Google says it is "commited" to web developers despite support for Android apps. "[W]e will continue to support the manageability of web apps for IT admins and a robust set of APIs for web developers," it says.

Googlebooks are available for pre-order now and will launch on October 4.

Synopsys announced its AgentEngineer solutions, a portfolio of “domain-specific long-horizon agents” built on its new Autopilot Platform. As the company details in a blog post, the portfolio covers six named domains: verification, system validation, implementation, analog and mixed-signal (AMS) design, manufacturing, and simulation and analysis. More than 50 customer engagements are underway, according to the company, and Synopsys confirmed to Tom’s Hardware Premium that general availability is planned for the end of 2026. This follows July, when the company showed agentic AI workflows developed with Nvidia and with Microsoft at DAC, the Design Automation Conference.

The launch brings Synopsys’ plans into focus with a named product line and a target date. The platform’s agents are clearly named and delineated, the engagement count points to customer interest, and a goal for general availability anchors a roadmap for autonomous agents in production. Two of the headline performance figures are restated from July, and the only named customer figure is one company’s range. While Synopsys describes the agents as autonomous, the approval checkpoints remain with humans, the company said.

For companies designing and producing chips who want to leverage the potential efficiency gains of AI, this technology allows them to “accelerate their shift from AI-assisted design to autonomous engineering,” said Ravi Subramanian, chief product management officer at Synopsys.

In a blog post published alongside the release, Anand Thiruvengadam, executive director of product management at Synopsys, detailed three layers: long-horizon AgentEngineers are “domain-specific super agents that orchestrate task agents,” task agents “complete specific, bounded engineering tasks” and can be orchestrated by an AgentEngineer or invoked directly by an engineer, and the tool layer’s engines “execute the requested work” but do not set goals or make decisions. Unlike long-running agents, which may perform one activity for hours or days, long-horizon agents address “goal complexity,” pursuing objectives that can take hundreds or thousands of reasoning steps.

The platform covers everything from orchestration to telemetry, with a “cognitive model” powering what Synopsys calls context intelligence. Access controls, encryption, and runtime guardrails protect customer, partner, and Synopsys IP, which is particularly important when third-party agents share the workflow. Customers can choose commercial, open-source, or fine-tuned language models and deploy on Synopsys Cloud, their own cloud, or on-premises infrastructure. In other words, customers can “bring their own LLMs and data and infrastructure,” Thiruvengadam told Tom’s Hardware Premium.

The blog outlines the verification loop — the agent plans, orchestrates task agents, checks what they return, and adjusts whenever an intermediate result falls short. When a test finds a bug, a root-cause analysis (RCA) agent reads logs, clusters errors, forms a hypothesis, and inspects waveforms to confirm it. The agent then makes “local rewrites of the RTL to prove that the bugs have indeed been fixed” and produces a bug fix manifest. When intermediate results drift from the objective, the agent will “course correct, adapt, react,” he said.

The performance numbers in Synopsys’ release are heady: up to 50x faster verification closure, 20% higher coverage, a 30% productivity boost, 2x better token efficiency, and lower latency. The 50x and 20% figures are not new. Synopsys told Tom’s Hardware Premium that they come from its July work with Nvidia, measured against its own verification workflows without AgentEngineer. The 30% number is at the top of the 10% to 30% range Fujitsu reported for its RTL code generation.

Those productivity gains are measured “compared to what the human experts would have done otherwise or are doing today,” Thiruvengadam said. The 2x token efficiency, meaning fewer tokens for a given task, is customer-reported: an unnamed customer compared Synopsys’ agents with its own, built on commercial agentic harnesses. No figure exists for the latency claim; the release and blog credit it in part to context intelligence, which suggests less time spent waiting on model calls.

Another engagement with results is AheadComputing, whose Vice President of Verification, Alon Mahl, said the Implementation AgentEngineer helped reduce manual engineering effort from RTL handoff through signoff, without giving a number. Intel, MediaTek, and Samsung also endorsed the technology. None gave hard results, but all supported the technology as promising. Today's launch is the portfolio and platform, without production details. Synopsys’ earlier AI tool from 2020, DSO.ai, has passed 100 production tape-outs, while the new agents are still in engagements.

How autonomous are these agents? Each vendor defines autonomy on its own scale, and Synopsys introduced its L1-to-L5 framework last year. “The original vision of L5 was fully autonomous execution. But not just fully autonomous execution, but also complexity,” Thiruvengadam told us, describing L5 as executing a complex workflow autonomously within human guardrails. “That was the idea, and that’s exactly where we are.” Synopsys confirmed that it characterizes the agents as L5. Cadence also claimed Level 5 on its own scale at Computex in June.

Earlier this year, Nvidia chief scientist Bill Dally said AI cut a 10-month, eight-engineer task, porting a standard cell library for GPU design, to one night, but that Nvidia is still “a long way” from having AI design a new GPU end to end.

Human engineers remain in the loop, but the amount of oversight varies. “The guardrails are still going to be defined by the humans, the crucial approval checkpoints are still going to be human-driven,” Thiruvengadam said. “Our customers will have to learn to trust these autonomous systems.” The blog adds that teams can set checkpoints where people inspect results, validate decisions, and redirect the workflow, then “reduce intervention” as confidence grows. No vendor has yet described when its agents stop retrying or escalate to an engineer.

Synopsys says the capabilities are already there; its next goal is general availability. Eyes will be on whether Synopsys reaches general availability by the end of 2026, and names a customer in production when it does. Cadence expects Level 5 early access in the second half of 2026, and Siemens has promised self-verifying capabilities in forthcoming releases. The product exists and works in customers’ hands, and the speedup claims, if they can be realized beyond internal evaluations, and especially if backed by independent testing, appear to be extremely promising.

Thermal Grizzly and Noctua have teamed up to release a new version of the WireView Pro II GPU monitoring device. By combining Thermal Grizzly’s power monitoring hardware with Noctua’s expertise in low-noise cooling, the WireView Pro II Noctua Edition aims to offer quieter operation by reducing the noise generated by the device’s cooling fan.

According to Roman Hartung, CEO of Thermal Grizzly, the GPU monitoring device has become a popular choice and has helped many users detect potentially dangerous connector issues with the infamous 12V-2x6 connector before they could cause damage. The WireView Pro II measures current independently on each 12V conductor rather than simply monitoring total power consumption. This allows it to identify unusual current distribution and potential contact issues that could contribute to connector damage. The device can also provide visual and audible warnings when configured limits are exceeded, with an optional automatic shutdown function.

"One of the most common points of feedback, however, was that the fan could still be noticeable in very quiet systems, so working with Noctua on a significantly quieter cooling solution was the logical next step - and, for us, really completes the product," added Hartung. For the Noctua Edition, the standard cooling solution has been replaced with a customized design featuring a Noctua NF-A4x10 fan, an optimized fan grille, and an enlarged CNC-machined aluminum housing. The fan uses semi-passive operation, remaining off for longer periods and only spinning when additional cooling is required.

In a worst-case scenario with the case fans turned off and temperatures above 40°C, it could handle up to a 300W GPU load without turning its fan on. When it does need active cooling, its fan runs under 2,000 RPM compared to 5,000 RPM on the standard mode, which cuts down noise from 39.4dB(A) to just 21.5dB(A) at a 10cm distance. This should make it essentially inaudible alongside the other fans in a very quiet PC.

The WireView Pro II Noctua Edition is available in Normal and Reversed variants to accommodate different 12V-2x6 connector and cable-routing configurations, along with an extended two-year warranty covering the GPU connector. While the press note suggests a retail price of $189.90, it is currently selling at $222.18 on Thermal Grizzly’s official online store.

Game streaming over your local area network is cool, but game streaming as typically implemented is basically a hack. It borrows video streaming technology and applies it to interactive games, which isn't actually a great fit, like so many cases of using a tool for a task it wasn't really designed for. Legendary open-source dev Hans-Kristian "TheMaister" Arntzen (known for the libretro framework and Retroarch frontend), decided to tackle this problem by making a video codec called Pyrowave specifically designed for in-home game streaming, and now, that exact codec is implemented in the Steam beta client.

Your LAN has less than 10 milliseconds of latency; less than one millisecond if it's wired. However, in-home game streaming rarely achieves latency anywhere close to that because the process of rendering the game, encoding a video, sending it over the network, and then decoding it (before you can even see the new frame and react) usually takes upwards of tens of milliseconds, meaning that even on a LAN it's possible to have noticeable input lag when streaming.

There are also possible compromises on image quality for in-home streaming. Typical video codecs like AVC and AV1 rely on a lot of "tricks" to reduce how much real data they need to use to encode a video stream; one of the most common is chroma subsampling, where a video uses less data to represent the colors in a scene, because human vision is much less sensitive to brightness than color. This is fine for a lot of games, but it can cause problems on the desktop as well as in games with lots of text (or similar fine elements), because the text develops nasty fringing that makes it hard to read. You can solve this by using 4:4:4 video, but that's actually not very well supported by common video codec hardware.

Arntzen's Pyrowave solves both of these problems (latency and quality) by working in a fundamentally different way from other video codecs. Instead of using Discrete Cosine Transforms and inter-frame encoding, Pyrowave is similar to Motion JPEG2000 and uses Discrete Wavelet Transforms along with intra-frame encoding. There are a lot of downsides to this approach, but a lot of upsides, too. You get very consistent quality from frame to frame (making it perfect for constant bitrate applications) and you also get excellent error resilience. Because Pyrowave is very simple and computed on the GPU's shader array rather than the video engine, which doesn't understand it, you also get insanely low latency, and there are no concerns about the capabilities of fixed-function hardware.

The downside? Well, it's in the headline: bandwidth. In the Steam beta client patch notes where Valve announced the addition of this feature, Valve notes that the codec uses "5-10 times the amount of bandwidth of other streaming codecs." So how much bandwidth is that, really? In a brief test of Phantasy Star Online 2: New Genesis, streaming to a Lenovo Legion Go S from a desktop, we clocked Pyrowave on default settings at about 210 megabits per second. That's over 26 megabytes per second of video going down the line, which is an incredible amount of data to be sending over a network so you can play a video game in bed without sacrificing visual quality or frame rate.

But most notably, it was tangibly more responsive than the usual Remote Play experience, and best of all, the image quality was quite exceptional, especially once we ticked on the 4:4:4 mode. Unfortunately, we weren't able to see if the GPU overhead was overbearing with an RTX 5070 Ti and frame rates capped at 120 FPS for streaming.

Just for clarity's sake, while it's possible that Pyrowave streaming could cause service interruptions for other people on your LAN (and thus isn't suitable for high-traffic networks like at a company or large business), it is strictly intended to be used over your local network, not the Internet. As a result, your internet connection doesn't matter at all, so if you were worried about ripping through your data allotment on a metered connection, there's no need for alarm; all of the data sent is between devices on your network. Even the over-200 megabits-per-second of Pyrowave is peanuts compared to the tens of gigabytes per second your graphics card is sending to your display via DisplayPort or HDMI, after all.

If you'd like to test out the Pyrowave codec yourself with Steam Remote Play, you'll need to be on the Steam beta client first. After you swap to the beta client, go into the Remote Play settings and you should see the option for Pyrowave. It's currently only available for standard games (i.e. not VR) on macOS, Windows, and Linux, although Valve says it's coming soon to the Steam Link app for mobile devices as well. You'll need "at least Gigabit Ethernet", although user reports in the Steam discussions say that it works fine on a solid Wi-Fi 6E or Wi-Fi 7 connection, too.

Following the reveal of OpenAI’s Jalapeño ASIC, a clear question formed: Who is this for? That’s not to say the accelerator doesn’t have a purpose, but rather that OpenAI didn’t clearly define what its ambitions were in the hardware space. On one hand, the company suggested it was building ASICs for its own purposes when OpenAI and Broadcom revealed their partnership last year. On the other hand, OpenAI laid out benchmarks comparing Jalapeño to Nvidia’s Blackwell accelerators and doubled down on a multi-generational roadmap at Hot Chips 2026. Jalapeño is built for OpenAI’s compute needs, Richard Ho, Head of Hardware at OpenAI, told Tom’s Hardware Premium. However, the VP says “you could use it for anybody, honestly,” and left the door open for a wider rollout. You can read the full transcript of the interview here.

“We have such a strong demand for compute within the company. It's going to take us a good long time to even fill our own demand, which is growing all the time,” Ho said. “I think that we're going to have our hands full just providing compute for OpenAI for a good long time. That's not to say that it can't be used elsewhere. I believe it could be, but I think our priority is to make sure that OpenAI's compute needs are met first and foremost.”

The competitive positioning of Jalapeño mainly comes down to the benchmarks OpenAI shared during Hot Chips, run on SemiAnalysis’ InferenceX benchmark and comparing Jalapeño to Nvidia’s GB200 and GB300. ASICs are common, but competitive performance for them isn’t common, and for good reason. They’re built to accelerate specific workloads. With Jalapeño, however, OpenAI demonstrated the chip accelerating its own open-weight GPT-OSS model, as well as DeepSeek R1 and Kimi K2.5.

Originally, OpenAI didn’t plan to show benchmarks at Hot Chips, and the company wasn’t sure if it would present at the event at all, Ho told us. The executive reiterated the story OpenAI told on the Hot Chips stage, about how a team of engineers got Kimi and DeepSeek up and running on Jalapeño in the two months between the A0 sample and the Hot Chips presentation.

Although Ho was clear that Jalapeño is being deployed internally and will remain internal for the time being, he certainly left the door open to a wider entry into the hardware market. Speaking on the benchmarks shown at Hot Chips, Ho said: “What we really wanted to demonstrate, to put to rest, the misperception in the industry that our custom inference chip was only for OpenAI models… It’s programmable, and it’s general purpose, and it’s not hard-coded for OpenAI models.”

One possible explanation for reluctance to enter the external hardware market is supply. Ho said “there’s a new baseline for supply,” referring to the past two years of Ho and OpenAI CEO Sam Altman touring fabs and asking for more capacity. Although Ho says “[OpenAI is] in good shape” on the supply front internally, supply to feed external customers is likely a different story.

Jalapeño works for other models, but raw competitive performance wasn’t the main design goal. When I asked about the driving force behind designing Jalapeño, Ho was blunt: “It was efficiency.” The executive pointed to efficiency as a cousin of compute, noting the power-constrained modern AI data center and how a more efficient inference engine represents more effective compute.

Ho also pointed to that same pragmatic decision-making as a driving force behind designing Jalapeño, notably around codesign with OpenAI’s internal models. “[Codesign is] something that you can’t do with a third-party silicon merchant really well because there’s a lot of research IP in the models, and so you just can’t share that widely because it will leak. It will get out there no matter how many NDAs you put in place.”

If Jalapeño were destined for a wider rollout, it wouldn’t be going up against Nvidia’s Grace Blackwell platform, but the newer Vera Rubin platform. Ho said that the comparison against Blackwell was “because those were the best published results that we could find.” However, the company has run more benchmarks internally, both against Vera Rubin and for larger context windows.

The InferenceX benchmarks only looked at 8k1k benchmarks, which represent a fixed 8,000 input tokens and 1,000 output tokens. Ho said OpenAI’s internal benchmarks show that the ASIC “seems to perform even better than the existing benchmarks from some of the other devices that are available.” More interesting is the comparison to Vera Rubin, which OpenAI says looks good.

“Obviously, but the time we deploy, it’ll be [Vera Rubin], maybe even VR Ultra in some parts of the deployment schedule. We’ve done our internal ones, but obviously we don’t publish those. Those have to come from Nvidia and other people who are able to do that.… yeah, we’re doing really well on those,” said Ho.

From September 28 through October 2, you can read Tom's Hardware Premium's AI Chip Design Week coverage for free. All you need to do is sign up for a free Tom's Hardware membership to explore our detailed coverage.

Headlining the week is our interview with OpenAI hardware boss Richard Ho, who lifts the lid on everything to do with Jalapeño, the company's AI-designed inference ASIC, which made headlines earlier this year at Hot Chips 2026. We supplement this coverage with a brief history of how AI is being used in EDA tools, the future of artificial intelligence-assisted AI designs ... and there's much more to come.

Don't want to miss out on what's happening on the frontier of the semiconductor industry? Just sign up for a Tom's Hardware account, and you'll be all set to read every piece of content as it's published. Every article is crafted by our expert writers, who dig deep into everything to do with the current state of AI in the chip design ecosystem, from Premium News reports to our OpenAI interview, in-depth reports on the state of the industry, and much more.

With Tom's Hardware Premium, you get detailed articles full of analysis, which offer insights that you won't ordinarily get from a shorter story.

So, to prepare for our AI Chip Design week of content, just create an account, link your Forum account, or subscribe to Tom's Hardware Premium. After our week of content is over, all of the special features will be back behind our Premium-only paywall. If you want to support our coverage, you can sign up for our subscription service from $29 per year, or $7 per month with a rolling subscription.

Get detailed coverage all year round

If you've not subscribed to Tom's Hardware Premium yet, here's everything that our subscription service offers.

First up, you get access to Premium News articles, which dig deeper into technical topics related to chipmaking, upcoming hardware, AI, supply chains, and the politics that define the hardware industry. We enlist our team of authors to deliver unparalleled Premium Features, which delve into everything from benchmarking the latest open-weight AI models and interesting hardware to our take on what's going on in the industry at large. These are all bolstered by our two-pronged approach to forecasting what's happening in the industry today and what lies in wait for years to come with our Premium Roadmaps, which detail every nook and cranny of the semiconductor industry at large.

Additionally, subscribers get access to Bench, our powerful internal benchmarking database, where you can compare benchmarks in specific workloads across hundreds of products.

Rounding all of our coverage out is a weekly newsletter named Uptime, where you can expect an exclusive letter from the editor, rounding up the biggest topics of the week, which you won't find anywhere else.

Subscribing to Tom's Hardware Premium enables us to keep doing what we do best: offering unparalleled insights into the hardware industry, built on our 30-year track record of uncompromising independent journalism.

Subscribe now.

OpenAI revealed its Jalapeño inference ASIC at Hot Chips in August 2026, a chip that leaned heavily on AI to deliver an incredibly short design window. Following the reveal, Tom's Hardware had the opportunity to sit down with the company's VP of Hardware, Richard Ho, to answer some of our most pressing questions about how the chip came into existence, future ambitions, and how AI might be used in the development of silicon.

The following article is a full transcript of our interview with Richard Ho, which has been edited for flow and clarity. You can also read additional interview transcripts we produced earlier in the year, featuring Intel, AMD, Nvidia, Valve, and more. This transcript is free to access for a limited time as part of Tom's Hardware Premium's AI Chip Design Week.

Jake Roach, Senior CPU Analyst, Tom's Hardware: It was quite the ending to Hot Chips when you dropped this. I want to start at a high level. There are a lot of reasons for OpenAI to develop its own ASIC, but was there one thing that you could point to more specifically that was a driving force? Whether it’s performance, efficiency — what was it that really drove that decision?

Richard Ho, VP Hardware, OpenAI: It is efficiency. I think that’s the main thing that we’re aiming for, because obviously, as Sam [Altman] has been saying, we are going to be compute-limited, and a compute limitation is really how much power we can get into data centers.

What we want to do is be as efficient as we can with the limited compute and limited power that we’re going to be able to get, and make the most of it. Because what we really care about is how much intelligence we can deliver to the users, and having a more efficient inference device is very useful. That’s why we focus on inference, because training happens, and you do a lot of compute with the pre-training, but really the cost to the user is on the inference side, and their perception of intelligence is going to be there. Their user experience in terms of how fast ChatGPT responds, or how fast Codex responds, or how fast the agents respond — the latency really matters.

You can see all of those things in the ingredients of what we announced. You can see that we have both a very good low-latency device for those who really care about it, and we can very easily just turn the knob and get very good throughput, so you can reduce the cost of that inference. Really, that’s the thing that we were aiming for. I’m very happy that the team managed to deliver that.

The benefits of building in-house

Roach: Developing your own ASIC versus going with something that’s currently on the market— were you just not satisfied with the efficiency of current offerings?

Ho: Well, I wouldn’t say that. The way to really think about it is we wanted to take advantage of the co-design opportunity that we had. It’s something that you can’t do with a third-party silicon merchant really well, because there’s a lot of research IP in the models. You just can’t share that widely because it will leak. It will get out there no matter how many NDA’s you put in place.

Ho: Having an internal team being able to work with our researchers, who are able to have full visibility into the full stack, and take care of that: “Should we do this in the software? Should we do it in the model? Or should we do this optimization in the hardware?” We can make those trade-offs intelligently because we have that full visibility, and I think that’s where it comes from.

A lot of the benefit of Jalapeño is that visibility that we had and [we were] able to see exactly what hardware was needed to make those trade-offs. Be intelligent, put whatever we need to put back into the compiler, back into the stack, but really make the hardware fly for this particular application here, which is the outcome of this full-stack co-design opportunity of being inside OpenAI.

Roach: I did want to clarify some points here, because there’s been various quotes floating around about optimizing for this specific workload, and I think that has been maybe misattributed to optimizing specifically for OpenAI’s workloads.

Ho: Yeah, it’s misattributed. The whole point of using the InferenceX benchmark from SemiAnalysis was that it was (using) open-source models, and they’re different models. The architecture is different, and their sizes are different. What we really wanted to demonstrate, to put to rest, the misperception in the industry that our custom inference chip was only for OpenAI models — we’ve shown with the Hot Chips results that it flies on open-source models, flies on any LLM, in a sense. All transformer-based LLM models will be very performant.

The thing we also wanted to show was just how easy it was to program. Taking these models, which we did not even look at until after we got the chip back, and getting them up and being performant in two months, roughly, and being able to present the results, shows it’s programmable, it’s general-purpose, and it’s not hard-coded for OpenAI models.

Roach: It leads me to wonder: Jalapeño is obviously for OpenAI’s inference workloads. Is that all it’s for, or are you considering external customers? What is the plan with OpenAI hardware?

Ho: You could use it for anybody, honestly. But we have such a strong demand for compute within the company. It’s going to take us a good long time to even fill our own demand, which is growing all the time.

With the growth of the daily active users and weekly active users, with the new models, with the new capabilities of Codex, and all the other reasoning things that are going on — and there’s new announcements coming that [are] not out yet, but we kind of know internally — I think that we’re going to have our hands full just providing compute for OpenAI for a good long time. That’s not to say that it can’t be used elsewhere. I believe it could be, but I think our priority is to make sure that OpenAI’s compute needs are met first and foremost.

Inside the tools and timeline

Roach: Moving to the timeline, it’s remarkable that — what, nine months, I think it was, to initial RDL the tape-out? Really remarkable. Assisted by AI. Does that get faster? Is this kind of ground zero of what we can do with an AI-assisted design process? Are you able to move quicker as you ramp up your roadmap?

Ho: The way I like to think about it is, we’ve established a new baseline. In the old baseline, you’re talking 18 months to two years, roughly. Often that’s even with some existing IP or some more legacy architecture design. We’re starting from scratch here. We had nothing. There’s not a line of code here to refer to.

What we’ve established is that there’s a new baseline that you can do with a very talented team with the help of AI. Now, does it get shorter? It depends on what you’re trying to do.

With Jalapeño, we made some, I consider to be, smart and pragmatic trade-offs on the architecture, the microarchitecture, to hit a very fast time to market because the compute need was so high. It’s like, “Okay, how fast can you get this device for us?” There were some pragmatic trade-offs.

If you were to make a much more complex device — and technology is coming along, with 3D stacking, with co-packaged optics, and stuff like that — will it take longer? Will it take nine months? I won’t say it will take nine months. I think it will go faster than if you didn’t have AI models. If you’re doing a derivative design of Jalapeño, it should go much faster than that. We should be able to do that really, really fast.

What we’re saying is that I think we’re establishing a new baseline: nine months from scratch. Then you’re going to have your usual engineering ups and downs from there. But we think that every engineering team in chip design should be able to use this as a new baseline, because it’s a proof point that the models that are in use — the AI models for us is mostly Codex, Sol, the one before Sol, and now we’re moving on to Astra. These are super capable.

Even from when we started that work, back in November 2025, to when we taped out, the models improved enormously. Even from that moment to when we started doing the kernel optimization in May, when the chips were first coming online, we ourselves were shocked at how much better Codex was and what it could do.

I’ll be honest with you: We were actually a little bit surprised at the performance we were able to squeeze out in those two months of sprinting on the benchmark, because we just didn’t realize just how good the models were at doing kernel optimization.

That’s something that everybody can learn from, to be honest. It’s a proof point that it can be done. This is how AI should be used. We didn’t replace our engineers; they just became super productive. With a smaller team of really good engineers with a lot of this AI stuff, you could do things faster and better than you could otherwise. I think that’s a good model of how engineering should be approached in the AI age.

Roach: I appreciate that insight. I know for at least some of our readers at Tom’s Hardware, the idea is, “Make me a CPU” in ChatGPT, and then it spits something out. But obviously, a lot more has gone on.

During the development process, are you using standard EDA tools from Cadence and Synopsys? And where are those?

Ho: I think this is super important. In general, my team is very open-source-pilled in many ways. We actually put stuff back into open source, and we were open-source-pilled before we got here.

But for sign-off, you need to use the standard EDA flows, and we did, because you want to make sure those results are good and correct. There’s no real alternative today. Part of it is this combination of standard flows optimized with AI, optimized by really good engineers.

Interest from the wider industry

Roach: Obviously, you guys work with hardware vendors across the industry. I’m curious if you’ve had conversations with them post-Jalapeño reveal about this AI-assisted process, and if you’ve heard anything from them.

Ho: Yeah, we engaged with them before the reveal as well because we knew the results were there, so we started talking with some of them. Post-review, we did get a lot more communication with them.

I’m not going to preempt anything here. I can tell you that there’s a lot of interest in the industry, and I would also tell you that we feel that there is a lot of benefit in industry generally that we want to enable.

This is not something that, “Hey, we have this, and we’re going to keep it to ourselves.” It’s not one of those things. We want to make the industry more productive in general because better compute from everybody helps us as well, and so we want to make sure everyone gets it. I think that’s something that we’ll see more about quite shortly, to be honest.

Roach: Just to clarify, when you’re saying you’re seeing interest from the industry, that is for the design flow, how you built the chip, not necessarily, “Hey, we’re going to throw out a bunch of Jalapeños to everyone.”

Ho: Right, exactly. What we did to make those timelines, what we did to get the performance boost at the end. How did we do it? What did we use? I think those are learnings that we want to bring out to the industry as well.

As you probably are aware, there is a pretty active startup scene around AI for chip design, and it’s good. There’s a lot of smart people thinking about it and trying to do it. We have our take on that, and I think at some point we want to tell the world, “Here’s our take on it.”

Fundamental to that is Codex and GPT-6 Astra coming out. Those are fundamental, and we can basically point to it; it’s not going to be slideware or vaporware. We can point to it and say, “Here’s what we did, here’s how we did it, and here’s what we got.” It’s going to be very concrete.

Roach: So it was a proof of concept that ended up being quite a bit faster than expected?

Ho: Yeah. To be honest, the way it worked — and I’ll give you a little bit of insight — our engineers were just like, “Oh, we have these models, and they’re kind of cool. Should we try them?”

They tried them. There was no real “This is what we’re gonna do, and here’s how we’re gonna do it.” They just tried it at a grassroots level. Then they’re like, “Oh my God, it’s so good. Hey, come over here, have a look at this.” Then slowly the whole team got, “Oh man, this is really useful and really good, and here’s how we’re gonna do it.”

The researchers helped us. The researchers we have in the company helped us when we ran into some, “Oh, it doesn’t quite do it this way,” and we’d ask them, “Is there any way we can fine-tune it or something like that?” Then they would come back with replies.

It was really a collab between the chip team and the research team. We do sit with them. The chip team is actually considered part of that research-adjacent organization here within OpenAI. The collab has been really close, because that’s how we got the co-design to start with.

But then this part was almost a bonus. We didn’t set out necessarily to do this as a target for what we did. It just turned out that, “Oh yeah, this is really useful.” The engineers loved it, and now we have a way to do this.

Roach: I want to zoom out a little bit here, because one of the concerns with everyone right now is supply, just in general. Not only supply, but even space to do anything. Where are you with that? I’m assuming you’ve anticipated this situation and have secured your supply.

Ho: It’s a hard situation because supply is very limited. I don’t want to say, “I told you so,” but two years ago, Sam (Altman) and I were doing a tour around all the different fabs and suppliers. I went to say, “Please, please, please build more, build more. We’re gonna need it.” And they were like, “Hey, trust us. We’ve seen the cycle before.”

But I think it’s now become evident to everybody that, just like we were talking about, there’s a new baseline for how to do chip design. There’s a new baseline for supply and what we need in terms of memory, in terms of logic wafers, in terms of all the rest of the components that go into it, SSDs and everything else. The supply chain is responding, but it takes years to get that going.

We’ve seen this for a while, and so we’ve been active in trying to make sure that we have our supplies established and set up. We think we are in good shape for that.

Using Turing over Vera, and OpenAI's north star

Roach: I cover chips broadly at Tom’s Hardware, primarily focused on CPUs. We have someone who focuses more on graphics, and it was interesting to me to see — I was reading the SemiAnalysis article about it, about the Turing rack that goes alongside a Jalapeño rack.

What was the decision there for Turing and not Vera? I would have expected, given the close working relationship between Nvidia and OpenAI over the years, I would have expected Vera. What makes Turing the right fit?

Ho: The way we approached that design was really in terms of de-risking and being able to do that design fast. Vera, as a standalone, is a little bit behind on that maturity level. The Turing device is strong. It did what we needed to do, and partly our partners had some experience with it.

It wasn’t necessary for us to take a huge risk on that, and so we didn’t. As I said earlier, for the Jalapeño program, we were trying to make very pragmatic decisions. We wanted to be aggressive on the goals of the performance and the cost, but we didn’t want to take unnecessary risks. That felt like a good design decision that would fit within the parameters of how we make these design decisions.

Roach: I’m curious internally: Is the scope of Jalapeño right now — you have a huge compute need. It may not even be able to satiate that. Would the idea be, “Hey, if we can run everything on our own accelerators one day, that’s great”? Is that the ultimate pie-in-the-sky goal?

Ho: I think the ultimate goal is to use the best device in terms of performance and cost. If it turns out that it’s our own internal device because we can do the co-design, because we can do the rest of it, and we then get the performance benefit per watt, then yeah, let that be the case.

But if it’s not, if there is another chip that’s provided by a silicon merchant or another partner, I’m more than happy to put those in the fleet. Our goal is to lower the cost of infrastructure. That’s what our goal is. Whatever the best way to do it is, we’ll do it.

Now, we’ve taken a bet that we can do better than merchant silicon because of this co-design benefit, and it seems to be paying off with Jalapeño. Will it continue paying off? I believe so. But am I going to say that’s our north star? No. I’m going to say our north star is the lowest cost of infrastructure we can get.

Roach: I wanted to ask you the question because I know we’re going to get comments about, “Oh, they’re still using Nvidia. They’re still using AMD.” Obviously, you guys use everything at this point.

Ho: We use everything at this point. But as you know, it’s a constant — you can’t imagine — it’s a constant evaluation. We’ll constantly be evaluating as we continue to deploy, and so the ratios might change.

But as long as we keep that North Star in mind, what is the best device, and not have this attitude of, “Well, we built it, so it has to be there” — and that’s not the way we think about it — then I think we’ll be doing the right thing for both ourselves and our end customers.

Speculative decode and performance on Jalapeño

Roach: Drilling down a bit more into the technical weeds — I know we’re running up close here — speculative decode is currently not implemented on Jalapeño. Do you plan to implement it on Jalapeño?

Ho: It’s implemented in the hardware. The only reason we didn’t benchmark it is that we didn’t have the time to train those draft models to do the speculative decode with Jalapeño. We have internal models that do it. That’s the only reason we did that benchmark again.

Just to give you the background on that one. We did not plan on doing this benchmark until after we got the chip back. We saw it was working; it was working really well. They said, “How are we gonna tell the world about this?” And we said, “Oh, that benchmark. Let’s go for it.”

It was crazy. It was two months until the paper deadline — the presentation deadline. Just like, “Can we do that? And how many of these models can we get done?” We just went for it, and we said, “Well, there’s no time to do the multi-token prediction, but hey, it looks like our single-token prediction might be better than the multi-token prediction. So let’s just publish those results, because that gives you an indication.”

The multi-token prediction is going to be 3-5x performance. That’s in our pocket. We have that available, and we’re going to roll that out in our own models. When we put it into production, we’re going to have that available.

But it didn’t seem necessary to do that for the benchmark, because if your single-token prediction is better than the current state-of-the-art multi-token prediction, you know that your multi-token prediction is going to be much better. That was the reason behind that.

Roach: So you’re saying you get the chip back. You have two months. You weren’t even planning to show off benchmarks originally?

Ho: No. The Hot Chips organizers were actually very flexible and nice. They asked us, “Do you want to present this year?” And we said, “We’re not sure. How late can we tell you?”

They had this last slot, and they kept it there. And if not, the program would have just ended earlier or something like that. Then finally, very late, after we got the chip back, we were like, “Can we have it?” And they said, “Yeah, go for it.” And we went for it.

Roach: Another question I had is looking at longer context windows. If I’m not mistaken, all of them are 8K/1K on the SemiAnalysis InferenceX benchmark. I know you haven’t shared those. I’m assuming you’ve looked at longer context windows internally.

Ho: Yeah, internally, of course. Like we said, I think we said this somewhere in one of the slides, is that on internal models, the gap gets even wider. Yes, with longer context, with even bigger models, Jalapeño seems to perform even better than the existing benchmark from some of the other devices that are available.

I would also highlight that we did a lot of comparisons against Grace Blackwell, but that’s because those were the best published results that we could find. Obviously, by the time we deploy, it’ll be Vera Rubin, maybe even Vera Rubin Ultra in some parts of the deployment schedule.

We’ve done our internal ones, but obviously we don’t publish those. Those have to come from Nvidia and other people who are able to do that. We won’t publish those results ourselves.

Ramping and the future

Roach: I believe this is right — Jalapeno has a slow ramp-up through the rest of the year, but 2027 is when the ramp really...

Ho: 2027. Yeah. I think we want to get some amount in there if we can, a very small volume, just to make sure that everything’s working well and we can test in the production environment. Then 2027 is when the ramp is going to really show up.

Roach: Going back to your roadmap here, you wanted to set a new baseline. You’ve obviously announced two more generations [...]Gen 2 is approaching tape-out. Is that the same cadence moving forward? Is it around Hot Chips next year when we should expect to learn more about Jalapeño 2?

Ho: Let me be clear about that. I’m not of the opinion that you should just tape out on a calendar schedule.

We want to tape out when the device that we have in mind makes some kind of step-function improvement in some way, like performance per watt, raw or latency. A lot of that is dependent on when technology becomes available.

Whether it be which generation of HBM you’re using, which type of SerDes you’re using, or whether you can get optical communication closer to the silicon. Our projects and tape-outs will be dependent on the maturity level of the technologies.

We can do very fast execution. Will we do those types of executions back-to-back? I doubt it, because the technology will not be ready for that, and I don’t want to tape out something that is 2% better than what I taped out before, because it’s not worth it to change a fleet. But what I’ve been seeing is the technology does improve at a cadence which is pretty reasonable, and we’ll be able to do our execution fast within that.

The most important thing is building the right device. You've got to spend enough time to build the right device. Know what that device is. Then when you build it, just build it fast. Get it out as fast as you can.

But you need to spend enough time to know what’s the next best device, and it’s not just a routine on the treadmill type of thing. That’s the thing I don’t think we want to be on the treadmill for, just for the sake of it. We want to really make a step improvement with every device we do.

Roach: One of the most interesting slides to me is really early in the presentation, where you’re listing out goals, and not only goals, but you listed out the non-goals. I thought that was really telling, because you got to define what you’re not trying to do.

Ho: Exactly. We want to be very thoughtful about our program here because we are a very small team. The things that we do, we want to make a really high impact, and the impact is for the north star: enabling more intelligence, more cheaply for our customers. That’s the thing we’re trying to do.

We want to be very thoughtful about what it would take to do that. As I said, if something can be provided by the ecosystem, and we can’t do better than that, then we just take the ecosystem.

We’re going to always do something that we think is taking advantage of our co-design, taking advantage of our knowledge of where things are going, and being able to use that intelligently.

[Session Ends]

PlayStations are traditionally where you go to play PlayStation games, but now you can also use your PS5 to play Nintendo Switch games, too. At least, you can, so long as your PS5 is jailbroken and running the right version of Sony's software. And even then, not all games work, and those that do work might still have performance issues.

Backing up slightly, this whole thing is made possible by a project called ProsperoEden, which is based on the Eden open-source Nintendo Switch emulator that already works on Windows, macOS, and Linux. ProsperoEden takes that open-source base and then adapts it to work on the PS5, and while it's only available as an early alpha version right now, it does indeed work, as reported by VideoCardz.

According to the project's documentation, a number of games have been tested with varying degrees of compatibility. Cuphead and Metroid Dread are said to run fine, reaching at least 40 FPS. Hollow Knight, Horizon Chase Turbo, Mario Kart 8 Deluxe, and a handful more achieve similar results.

At the other end of the scale, The Legend of Zelda: Breath of the Wild is "unplayable," while Animal Crossing: New Horizons runs "with major issues" and a frame rate that sits around the nausea-inducing 15 FPS.

The confusing compatibility situation can probably be put down to the fact that the emulator currently uses OpenGL, since there is no Vulkan renderer available to it. The PS5's firmware is also a variable not to be ignored. While most testing was done on a PS5 running the version 6.02 firmware, some builds of the ProsperoEden emulator have been known to work on firmware version 12.70. All of this is to say that your mileage may very well vary if you intend to take ProsperoEden for a spin on your own console.

The good news is that the project is in active development, so compatibility may improve over time. The latest v1.000.010 release promises improved game loading and includes fixes specifically for the Metroid Dread and Super Mario 3D World titles. It also includes improved OpenGL rendering and performance, including multisample operations, render-target compatibility, shader lifetime handling, and depth copies.

Anyone wondering about connecting their Switch Joy-Con to a PS5 needn't worry; ProsperoEden supports DualSense controllers, and there's even support for saving your game so you won't have to start from scratch every time you play.

If you want to check out ProsperoEden for yourself, you can. It's available as a free download via the project's GitHub page right now. There's no guarantee it'll hang around for long, though. Nintendo has a history of taking down emulation projects hosted on GitHub.

The Thunderbolt 5 market is starting to heat up, as we’re seeing more players enter the increasingly crowded field. We’ve previously looked at docks in the sub-$400 price category, and premium offerings crossing the $600 barrier.

Today, we’re focusing on two new entries in the sub-$400 category: the VectoTech V-Core and the Orico TB5, priced at $349 and $399, respectively. Both offer a wealth of USB and Thunderbolt ports, 2.5 GbE Ethernet, and internal M.2 slots. While their specs look similar on paper, at the end of our testing, there was a clear winner.

VectoTech V-Core

Design of the VectoTech V-Core Thunderbolt 5 Dock

The V-Core has what I’d call a traditional, candybar form factor. It’s meant to sit flat on your desk, unlike chunkier docks that can also operate vertically. At first glance, I thought the V-Core was made of lightweight aluminum. However, it wasn’t until I started fumbling around, trying to figure out how to access the internal M.2 SSD slot, that I discovered the unfortunate truth: the V-Core is constructed almost entirely of plastic. That includes the lower and top chassis, and much of the internal structure.

It’s a stark departure from every other Thunderbolt dock that I’ve tested, which are made from aluminum to help dissipate heat – which can be intense when a dock is under load. In addition, the top cover wiggled around when snapped into place (it uses a friction fit to attach to the main chassis).

With the top cover removed, you can see an internal cooling fan, which is essential for cooling Thunderbolt 5 docks with internal SSD bays, and a large black aluminum heatsink held in place with two screws. After removing the screws, the heatsink lifts off, revealing an M.2 slot that supports up to an 8TB 2280 SSD. Here’s another nitpick: Instead of using a screw to secure the SSD, VectoTech uses a tiny, spinning plastic retaining clip.

This is a feature that’s handy to have on motherboards when you’re often reaching inside a case, sometimes while the case is vertical. But it makes less sense in a small dock – especially when this particular latch is smaller than we’ve seen on other M.2 mounts. It didn’t inspire much confidence that it would hold the SSD in place, at least not compared to traditional screws. That said, VectoTech offers thermal pads that cover both the top and bottom of your SSD.

When it comes to ports, the VectoTech V-Core left me scratching my head a bit: There are no native HDMI or DisplayPort ports on the dock. Most Thunderbolt docks include at least one of the two common video ports, so it was disappointing to see this omission here. It’s not the end of the world, however; you can always use an HDMI-to-USB-C or DisplayPort-to-USB-C adapter with the dock (at an additional out-of-pocket cost).

Front

• 1x Thunderbolt 5 upstream (80 Gbps bi-directional, 140W)
• 1x Thunderbolt 5 downstream (80 Gbps bi-directional, 60W)
• 1x USB-A 3.2 Gen 2
• 1x SD UHS-II slot
• 1x audio combo jack

Back

• 2x Thunderbolt 5 downstream (80 Gbps bi-directional, 15W)
• 2x USB-A 3.2 Gen 2
• 1x USB-A 3.2 Gen 1
• 1x 2.5 GbE (RJ45) port
• 1x 240W power port

Instead, you’ll find two Thunderbolt 5 ports on the front (one upstream, one downstream), a USB-A port, an SD 4.0 reader (no microSD), and a 3.5 mm headphone jack. Moving to the back, there are three additional USB-A ports, two downstream Thunderbolt 5 ports, and a 2.5 GbE port.

Orico TB5

Design of the Orico TB5 Thunderbolt 5 Desktop Workstation

Unlike the V-Core, the Orico TB5 has a chassis primarily constructed of a single piece of thick aluminum. The outer chassis has an oblong shape, with ventilation cutouts on the right and left sides.

The front and rear fascias are plastic, and where you’ll find the assortment of ports.

Front

• 3x USB-A 3.2 Gen 2
• 1x Thunderbolt 5 downstream (80 Gbps bi-directional, 60W)
• 1x SD UHS-II slot
• 1x microSD UHS-II slot
• 1x audio combo jack

Back

• 1x Thunderbolt 5 upstream (80 Gbps bi-directional, 140W)
• 1x Thunderbolt 5 downstream (80 Gbps bi-directional, 60W)
• 1x HDMI
• 1x DisplayPort
• 1x 2.5 GbE (RJ45) port
• 1x 240W power port

Up front, you’ll find an SD 4.0 slot, a microSD 4.0 slot, three USB-A ports (10 Gbps), one USB-C port (also 10 Gbps), and one Thunderbolt 5 downstream port. On the back, there’s one Thunderbolt 5 upstream port, one Thunderbolt 5 downstream port, one USB-C port, one DisplayPort, one HDMI port, a 2.5 GbE port, and a 3.5mm audio combo jack.

I was somewhat surprised to see both HDMI and DisplayPort in this relatively compact Thunderbolt 5 dock, but they are welcome additions here. It’s hard to be disappointed with Orico’s choice of ports on the TB5, as there’s a nice balance of USB-A, USB-C, and video outputs.

But my absolute favorite design feature of the TB5 is on its underside. Most Thunderbolt docks that feature an internal SSD slot require you to remove a screw to access the M.2 slot. However, the TB5 uses a magnetic cover that is easily removed with a fingernail, yet strong enough to remain attached when moving the dock around. It’s a small touch, but appreciated when swapping SSDs. The M.2 slot can accommodate 2280 form-factor SSDs.

Testing

Testing the VectoTech V-Core and Orico TB5 Thunderbolt 5 Docks

The lack of native DisplayPort and HDMI ports didn’t hamper my testing with the V-Core. My primary desktop rig uses a 49-inch WQHD monitor with native USB-C support, and it connected to the V-Core without issue at its native 240 Hz refresh rate with a Windows 11 PC and a Mac running macOS 27. I also tested the same monitor using the HDMI-to-USB-C and DisplayPort-to-USB-C adapters that I have on hand. Again, I had no issues with this setup.

The dock itself did get very hot; just as hot as the many aluminum-shelled Thunderbolt 5 docks I’ve tested. Although I didn’t experience any slowdowns or errors after extended use, I do wonder about heat soak with the plastic enclosure over time. The internal fan definitely helps, but it’s a concern that lingers at the back of my mind.

I tested the Orico TB5 across USB-C, DisplayPort, and HDMI connections without any performance issues or hiccups. Like the V-Core, the TB5 also includes an internal cooling fan.

Everything that I threw at both docks worked without issue. I hooked up USB mice and keyboards, my iPhone Air, a 1TB USB-C thumb drive, an Orico Thunderbolt 5 SSD dock, multiple portable USB-C monitors, and a DJI Mini 5 Pro drone. I also tested the 2.5 GbE LAN on both docks on my TP-Link Deco BE63 home network.

Among recent Thunderbolt 5 docks we've tested, the V-Core was at the back of the pack in both sequential read and write speeds (5,371.96 MBps and 4,083.95 MBps, respectively). Orico’s TB5, on the other hand, landed in second place, behind the UGREEN Revodock MaxiDok in sequential reads (5,745.11 MBps), and led the pack in sequential writes (4,335.56 MBps).

When testing the 2.5 GbE LAN on both docks, both maxed out at around 2,300 Mbps using iPerf3, which is right in line with what we would expect after taking into account TCP/IP packet overhead.

Bottom Line

Bottom Line

The VectoTech V-Core and the Orico TB5 are similarly priced and feature a similar form factor, but Orico’s TB5 is by far the superior entry here. For starters, it just feels like a more premium product, with its aluminum enclosure versus the V-Core's plastic. And accessing the internal M.2 slot on the TB5 is much easier, requiring a simple tug on the magnetic access door, versus prying off the plastic cover on the V-Core, removing two screws, and then prying off the internal heatsink.

In other ways that matter to most people, the TB5 includes native DisplayPort and HDMI connections for your monitors. The V-Core is USB only (necessitating a USB-C adapter for most monitors). And finally, while the V-Core was at the back of the pack in storage performance compared to its peers, the TB5 trended near the front.

Right now, the VectoTech V-Core is priced at $349 on Amazon, versus $399 for the Orico TB5. A $50 premium is certainly enough to consider going with the cheaper option. But more and better ports, faster throughput, and a better, more premium design make the Orico worth paying extra for.