RISC V: The Open Standard Architecture
Latest about RISC V
![SiFive logo on smartphone](https://cdn.mos.cms.futurecdn.net/zHvLVi855Yqe7CEquo9CoF-320-80.jpg)
SiFive selects a faster Chinese-made RISC-V CPU instead of an Intel chip for its latest development board
By Aaron Klotz published
SiFive's selects Chinese silicon instead of Intel's spin
![Stock image of silicon dies](https://cdn.mos.cms.futurecdn.net/JH3RATVXt9778kHNGL3HpC-320-80.jpg)
New RISC-V microprocessor can run CPU, GPU, and NPU workloads simultaneously
By Aaron Klotz published
XSi has created a new RISC-V microprocessing chip architecture that combines a RISC-V CPU core with vector capabilities and GPU acceleration into a single chip.
![Yingren YRS820](https://cdn.mos.cms.futurecdn.net/FR3ndPkCRmo4fb9YFWscdF-320-80.jpg)
China-made RISC-V PCIe 5.0 SSD controller promises up to 14.2 GB/s without a fan
By Zhiye Liu published
Yingren (aka InnoGrit) has announced the YRS820, a high-end PCIe 5.0 controller for consumer SSDs based on the RISC-V architecture.
![T-Head](https://cdn.mos.cms.futurecdn.net/M9s4X395kDajV9RZQYMxnX-320-80.png)
Alibaba claims it will launch a server-grade RISC-V processor this year
By Anton Shilov published
Alibaba continues to flex its RISC-V muscle, expects to roll-out datacenter-grade RISC-V CPU this year.
![SiFive](https://cdn.mos.cms.futurecdn.net/kLsGRxyVCwqJk8RfojzS6g-320-80.png)
Google to use RISC-V for its custom AI silicon — TPU to get open source compute core: Report
By Anton Shilov published
SiFive's optimistic outlook may point to new RISC-V licensing deal with Google.
![Official architecture imagery of the Indian RISC-V chip, Vega ET1031.](https://cdn.mos.cms.futurecdn.net/4jimyAG7JA8PBfdb4S55C6-320-80.png)
India's homegrown Aries 3.0 board has an onboard Vega CPU
By Christopher Harper published
India launches a RISC-V powered Aries v3.0 development board for roughly the equivalent of $20 USD. It's powered by a 32-bit, 100 MHz CPU with 256KB of SRAM.
![Loongson](https://cdn.mos.cms.futurecdn.net/TN3pXwEN6cDZLxbmXyoxUn-320-80.png)
Chinese chipmaker tapes out 16-core DragonChain-powered CPU, 64-core coming
By Anton Shilov published
Loongson tapes out the 16-core/32-thread LS 3C6000 CPU, preps 32-core and 64-core processors.
![GlobalWafers](https://cdn.mos.cms.futurecdn.net/HGZMhSKmkDFsvQ6jEshZqm-320-80.png)
China planning 1,600-core chips that use an entire wafer
By Anton Shilov published
Chinese Academy of Sciences builds 256-core Zhejiang 'Big Chip,' looking towards wafer-scale chips .
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